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diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index ddb408e3361e70d2750e1f076f12c92c52dc617d..68dcd8dab524d6f19d3b2228314241acab3b631b 100644 (file)
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -81,7 +81,7 @@ SVP64 RM `MODE` (includes `ELWIDTH_SRC` bits) for CR-based operations:
 
 | 6 | 7 | 19-20 |  21 | 22   23 |  description     |
 | - | - |-------| --- |---------|----------------- |
-|sz |SNZ| 0 RG  |   0 | dz  /   | normal mode                      |
+|sz |SNZ| 0 RG  |   0 | dz  /   | simple mode                      |
 |sz |SNZ| 0 RG  |   1 | 0   /   | scalar reduce mode (mapreduce), SUBVL=1 |
 |zz |SNZ| 0 RG  |   1 | 1   /   | parallel reduce mode (mapreduce), SUBVL=1 |
 |zz |SNZ| 0 RG  |   1 | SVM 0   | subvector reduce mode, SUBVL>1   |