re PR target/14960 ([3.4 only] -maltivec affects vector return with -mabi=no-altivec)

	PR target/14960
	* config/rs6000/rs6000.c (rs6000_stack_info): Rename total_raw_size
	to non_fixed_size, and leave out fixed_size from the sum.
	(generate_set_vrsave): Correct clobbers.
	(rs6000_emit_epilogue): Test TARGET_ALTIVEC with TARGET_ALTIVEC_SAVE.
	(rs6000_function_value): Test TARGET_ALTIVEC and TARGET_ALTIVEC_ABI.
	(rs6000_libcall_value): Likewise.
	* config/rs6000/rs6000.h (FUNCTION_VALUE_REGNO_P): Likewise.
	(FUNCTION_ARG_REGNO_P): Likewise.

From-SVN: r81129

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2b717ebb5264017d7a0137f9f39caad955fd8eab..b81ca8546acc62eaa6cfe7f091ad77ca13879c40 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2004-04-24  Alan Modra  <amodra@bigpond.net.au>
+
+       PR target/14960
+       * config/rs6000/rs6000.c (rs6000_stack_info): Rename total_raw_size
+       to non_fixed_size, and leave out fixed_size from the sum.
+       (generate_set_vrsave): Correct clobbers.
+       (rs6000_emit_epilogue): Test TARGET_ALTIVEC with TARGET_ALTIVEC_SAVE.
+       (rs6000_function_value): Test TARGET_ALTIVEC and TARGET_ALTIVEC_ABI.
+       (rs6000_libcall_value): Likewise.
+       * config/rs6000/rs6000.h (FUNCTION_VALUE_REGNO_P): Likewise.
+       (FUNCTION_ARG_REGNO_P): Likewise.
+
 2004-04-24  Ulrich Weigand  <uweigand@de.ibm.com>
 
        * expmed.c (expand_mult_highpart_adjust): Do not assume OP1

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 49f4f96ca7ae10143d84775ba1962a796c9d2e5b..715324ee25a95a7f56ed4f34a542d648b33ed949 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -10762,7 +10762,7 @@ rs6000_stack_info (void)
   rs6000_stack_t *info_ptr = &info;
   int reg_size = TARGET_32BIT ? 4 : 8;
   int ehrd_size;
-  HOST_WIDE_INT total_raw_size;
+  HOST_WIDE_INT non_fixed_size;
 
   /* Zero all fields portably.  */
   info = zero_info;
@@ -10993,14 +10993,13 @@ rs6000_stack_info (void)
                                         (TARGET_ALTIVEC_ABI || ABI_DARWIN)
                                         ? 16 : 8);
 
-  total_raw_size        = (info_ptr->vars_size
+  non_fixed_size        = (info_ptr->vars_size
                            + info_ptr->parm_size
                            + info_ptr->save_size
-                           + info_ptr->varargs_size
-                           + info_ptr->fixed_size);
+                           + info_ptr->varargs_size);
 
-  info_ptr->total_size =
-    RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT);
+  info_ptr->total_size = RS6000_ALIGN (non_fixed_size + info_ptr->fixed_size,
+                                      ABI_STACK_BOUNDARY / BITS_PER_UNIT);
 
   /* Determine if we need to allocate any stack frame:
 
@@ -11018,7 +11017,7 @@ rs6000_stack_info (void)
     info_ptr->push_p = 1;
 
   else if (DEFAULT_ABI == ABI_V4)
-    info_ptr->push_p = total_raw_size > info_ptr->fixed_size;
+    info_ptr->push_p = non_fixed_size != 0;
 
   else if (frame_pointer_needed)
     info_ptr->push_p = 1;
@@ -11027,8 +11026,7 @@ rs6000_stack_info (void)
     info_ptr->push_p = 1;
 
   else
-    info_ptr->push_p
-      = total_raw_size - info_ptr->fixed_size > (TARGET_32BIT ? 220 : 288);
+    info_ptr->push_p = non_fixed_size > (TARGET_32BIT ? 220 : 288);
 
   /* Zero offsets if we're not saving those registers.  */
   if (info_ptr->fp_size == 0)
@@ -11864,7 +11862,7 @@ generate_set_vrsave (rtx reg, rs6000_stack_t *info, int epiloguep)
      need an unspec use/set of the register.  */
 
   for (i = FIRST_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i)
-    if (info->vrsave_mask != 0 && ALTIVEC_REG_BIT (i) != 0)
+    if (info->vrsave_mask & ALTIVEC_REG_BIT (i))
       {
        if (!epiloguep || call_used_regs [i])
          clobs[nclobs++] = gen_rtx_CLOBBER (VOIDmode,
@@ -12509,7 +12507,7 @@ rs6000_emit_epilogue (int sibcall)
     }
 
   /* Restore VRSAVE if needed.  */
-  if (TARGET_ALTIVEC_ABI && TARGET_ALTIVEC_VRSAVE 
+  if (TARGET_ALTIVEC && TARGET_ALTIVEC_VRSAVE
       && info->vrsave_mask != 0)
     {
       rtx addr, mem, reg;
@@ -16218,7 +16216,8 @@ rs6000_function_value (tree valtype, tree func ATTRIBUTE_UNUSED)
           && TARGET_HARD_FLOAT
           && targetm.calls.split_complex_arg)
     return rs6000_complex_function_value (mode);
-  else if (TREE_CODE (valtype) == VECTOR_TYPE && TARGET_ALTIVEC)
+  else if (TREE_CODE (valtype) == VECTOR_TYPE
+          && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)
     regno = ALTIVEC_ARG_RETURN;
   else
     regno = GP_ARG_RETURN;
@@ -16236,7 +16235,8 @@ rs6000_libcall_value (enum machine_mode mode)
   if (GET_MODE_CLASS (mode) == MODE_FLOAT
           && TARGET_HARD_FLOAT && TARGET_FPRS)
     regno = FP_ARG_RETURN;
-  else if (ALTIVEC_VECTOR_MODE (mode))
+  else if (ALTIVEC_VECTOR_MODE (mode)
+          && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)
     regno = ALTIVEC_ARG_RETURN;
   else if (COMPLEX_MODE_P (mode) && targetm.calls.split_complex_arg)
     return rs6000_complex_function_value (mode);

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 7590dfd871709a92cdec6e7ddfd888e96aa01a97..f3d449377e57d8134ffc9bffe927372ffd35804d 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -1696,7 +1696,7 @@ extern enum rs6000_abi rs6000_current_abi;        /* available for use by subtarget */
 #define FUNCTION_VALUE_REGNO_P(N)                                      \
   ((N) == GP_ARG_RETURN                                                        \
    || ((N) == FP_ARG_RETURN && TARGET_HARD_FLOAT)                      \
-   || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC))
+   || ((N) == ALTIVEC_ARG_RETURN && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI))
 
 /* 1 if N is a possible register number for function argument passing.
    On RS/6000, these are r3-r10 and fp1-fp13.
@@ -1704,7 +1704,7 @@ extern enum rs6000_abi rs6000_current_abi;        /* available for use by subtarget */
 #define FUNCTION_ARG_REGNO_P(N)                                                \
   ((unsigned) (N) - GP_ARG_MIN_REG < GP_ARG_NUM_REG                    \
    || ((unsigned) (N) - ALTIVEC_ARG_MIN_REG < ALTIVEC_ARG_NUM_REG      \
-       && TARGET_ALTIVEC)                                              \
+       && TARGET_ALTIVEC && TARGET_ALTIVEC_ABI)                                \
    || ((unsigned) (N) - FP_ARG_MIN_REG < FP_ARG_NUM_REG                        \
        && TARGET_HARD_FLOAT))
 \f