x86: simplify and slightly correct XCHG vs NOP checking

For one, because of CheckRegSize, there's no need to check the size of
both (register) operands. And then in process_suffix() check opcode
space rather than the (potentially ambiguous) extension opcode.

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c58a570123f1e0bc48daddc8d6b8f0604686ec1b..3c1e2c91afced1a44504d08816a2e0666020bbd6 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6686,8 +6686,7 @@ match_template (char mnem_suffix)
              && t->opcode_modifier.opcodespace == SPACE_BASE
              && i.types[0].bitfield.instance == Accum
              && i.types[0].bitfield.dword
-             && i.types[1].bitfield.instance == Accum
-             && i.types[1].bitfield.dword)
+             && i.types[1].bitfield.instance == Accum)
            continue;
          /* xrelease mov %eax, <disp> is another special case. It must not
             match the accumulator-only encoding of mov.  */
@@ -7408,11 +7407,10 @@ process_suffix (void)
             need rex64. */
          && ! (i.operands == 2
                && i.tm.base_opcode == 0x90
-               && i.tm.extension_opcode == None
+               && i.tm.opcode_modifier.opcodespace == SPACE_BASE
                && i.types[0].bitfield.instance == Accum
                && i.types[0].bitfield.qword
-               && i.types[1].bitfield.instance == Accum
-               && i.types[1].bitfield.qword))
+               && i.types[1].bitfield.instance == Accum))
        i.rex |= REX_W;
 
       break;