mips.opt (meva): New.

2013-06-04  Catherine Moore  <clm@codesourcery.com>

        * config/mips/mips.opt (meva): New.
        * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS):
        Define __mips_eva.
        (ASM_SPEC): Handle -meva.
        * doc/invoke.texi (meva):  Document.

From-SVN: r199649

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4d892b5dbda303966b903832f3a8dd9ac555ac39..9757be14c2adbeb714a87f2a2604d22a9227541d 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2013-06-04  Catherine Moore  <clm@codesourcery.com>
+
+       * config/mips/mips.opt (meva): New.
+       * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS):
+       Define __mips_eva.
+       (ASM_SPEC): Handle -meva.
+       * doc/invoke.texi (meva):  Document.
+
 2013-06-04  Alan Modra  <amodra@gmail.com>
 
        * config/rs6000/rs6000.c (output_toc): Correct little-endian float

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index a8cf1dbedc7e7fb685aaf5606df198d27ebb8c59..9f983db7f81e7faf8819d8f32b29e03995d6b918 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -399,6 +399,9 @@ struct mips_cpu_info {
       if (TARGET_MCU)                                                  \
        builtin_define ("__mips_mcu");                                  \
                                                                        \
+      if (TARGET_EVA)                                                  \
+       builtin_define ("__mips_eva");                                  \
+                                                                       \
       if (TARGET_DSP)                                                  \
        {                                                               \
          builtin_define ("__mips_dsp");                                \
@@ -1125,6 +1128,7 @@ struct mips_cpu_info {
 %{mdsp} %{mno-dsp} \
 %{mdspr2} %{mno-dspr2} \
 %{mmcu} %{mno-mcu} \
+%{meva} %{mno-eva} \
 %{msmartmips} %{mno-smartmips} \
 %{mmt} %{mno-mt} \
 %{mfix-vr4120} %{mfix-vr4130} \

diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index e11710db3c0b0ba9ca0d8353b87173fd1b0d5751..08ab29b1810fca5be588e6ff736e0521bd1850e2 100644 (file)
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -141,6 +141,10 @@ membedded-data
 Target Report Var(TARGET_EMBEDDED_DATA)
 Use ROM instead of RAM
 
+meva
+Target Report Var(TARGET_EVA)
+Use Enhanced Virtual Addressing instructions
+
 mexplicit-relocs
 Target Report Mask(EXPLICIT_RELOCS)
 Use NewABI-style %reloc() assembly operators

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 66dcfe440e68f65dd2470254c7a310a03f6d3846..de57609540f33a5e15ad8f602d52c1a421e898ec 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -752,6 +752,7 @@ Objective-C and Objective-C++ Dialects}.
 -mno-float -msingle-float  -mdouble-float  @gol
 -mdsp  -mno-dsp  -mdspr2  -mno-dspr2 @gol
 -mmcu -mmno-mcu @gol
+-meva -mno-eva @gol
 -mmicromips -mno-micromips @gol
 -mfpu=@var{fpu-type} @gol
 -msmartmips  -mno-smartmips @gol
@@ -16376,6 +16377,12 @@ Use (do not use) MT Multithreading instructions.
 @opindex mno-mcu
 Use (do not use) the MIPS MCU ASE instructions.
 
+@item -meva
+@itemx -mno-eva
+@opindex meva
+@opindex mno-eva
+Use (do not use) the MIPS Enhanced Virtual Addressing instructions.
+
 @item -mlong64
 @opindex mlong64
 Force @code{long} types to be 64 bits wide.  See @option{-mlong32} for