freedreno/a3xx: fix gl_PointSize

If vertex writes pointsize, there are a few extra bits we need to turn
on in the cmdstream here and there.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
index 905af54e48dc02de4a5432f13068fa6f8a29a9e2..14d95baa1fee2b2059f3fef00485ab684f612cc5 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler.c
@@ -1997,8 +1997,10 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
                switch (name) {
                case TGSI_SEMANTIC_POSITION:
                        so->writes_pos = true;
-                       /* fallthrough */
+                       break;
                case TGSI_SEMANTIC_PSIZE:
+                       so->writes_psize = true;
+                       break;
                case TGSI_SEMANTIC_COLOR:
                case TGSI_SEMANTIC_GENERIC:
                case TGSI_SEMANTIC_FOG:
@@ -2013,7 +2015,7 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
                case TGSI_SEMANTIC_POSITION:
                        comp = 2;  /* tgsi will write to .z component */
                        so->writes_pos = true;
-                       /* fallthrough */
+                       break;
                case TGSI_SEMANTIC_COLOR:
                        break;
                default:

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c
index 998b8e9cf7c80a114bbc9e4a9ada8c618e759264..d40ee5c531090cada51d82d80d52f6d512be1d5c 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_compiler_old.c
@@ -1377,8 +1377,10 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
                switch (name) {
                case TGSI_SEMANTIC_POSITION:
                        so->writes_pos = true;
-                       /* fallthrough */
+                       break;
                case TGSI_SEMANTIC_PSIZE:
+                       so->writes_psize = true;
+                       break;
                case TGSI_SEMANTIC_COLOR:
                case TGSI_SEMANTIC_GENERIC:
                case TGSI_SEMANTIC_FOG:
@@ -1393,7 +1395,7 @@ decl_out(struct fd3_compile_context *ctx, struct tgsi_full_declaration *decl)
                case TGSI_SEMANTIC_POSITION:
                        comp = 2;  /* tgsi will write to .z component */
                        so->writes_pos = true;
-                       /* fallthrough */
+                       break;
                case TGSI_SEMANTIC_COLOR:
                        break;
                default:

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
index 50271fa137c5320df9dfe903eee4be71803003c0..619ac1ee353b7cf58b86b4f1126d053215bd159b 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_emit.c
@@ -448,19 +448,20 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
        }
 
        if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
-               struct fd3_rasterizer_stateobj *rasterizer =
-                               fd3_rasterizer_stateobj(ctx->rasterizer);
-               uint32_t stride_in_vpc = 0;
+               uint32_t val = fd3_rasterizer_stateobj(ctx->rasterizer)
+                               ->pc_prim_vtx_cntl;
 
                if (!key.binning_pass) {
-                       stride_in_vpc = align(fp->total_in, 4) / 4;
+                       uint32_t stride_in_vpc = align(fp->total_in, 4) / 4;
                        if (stride_in_vpc > 0)
                                stride_in_vpc = MAX2(stride_in_vpc, 2);
+                       val |= A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(stride_in_vpc);
                }
 
+               val |= COND(vp->writes_psize, A3XX_PC_PRIM_VTX_CNTL_PSIZE);
+
                OUT_PKT0(ring, REG_A3XX_PC_PRIM_VTX_CNTL, 1);
-               OUT_RING(ring, rasterizer->pc_prim_vtx_cntl |
-                               A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(stride_in_vpc));
+               OUT_RING(ring, val);
        }
 
        if (dirty & FD_DIRTY_SCISSOR) {

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index 6fc39a96380df2d1854bf066de47afc4c63b5c29..4cdd9387f9d5695d75c85c4dc0d8ed1f3f7511c5 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -494,13 +494,15 @@ fd3_program_emit(struct fd_ringbuffer *ring,
        if (key.binning_pass) {
                OUT_PKT0(ring, REG_A3XX_VPC_ATTR, 2);
                OUT_RING(ring, A3XX_VPC_ATTR_THRDASSIGN(1) |
-                               A3XX_VPC_ATTR_LMSIZE(1));
+                               A3XX_VPC_ATTR_LMSIZE(1) |
+                               COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE));
                OUT_RING(ring, 0x00000000);
        } else {
                OUT_PKT0(ring, REG_A3XX_VPC_ATTR, 2);
                OUT_RING(ring, A3XX_VPC_ATTR_TOTALATTR(fp->total_in) |
                                A3XX_VPC_ATTR_THRDASSIGN(1) |
-                               A3XX_VPC_ATTR_LMSIZE(1));
+                               A3XX_VPC_ATTR_LMSIZE(1) |
+                               COND(vp->writes_psize, A3XX_VPC_ATTR_PSIZE));
                OUT_RING(ring, A3XX_VPC_PACK_NUMFPNONPOSVAR(fp->total_in) |
                                A3XX_VPC_PACK_NUMNONPOSVSVAR(fp->total_in));
 

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.h b/src/gallium/drivers/freedreno/a3xx/fd3_program.h
index 8f491b05e4db7716caea33cf05474dbf11358199..8d4fd57ae752b602faf8313a2161d80dcaee5453 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.h
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.h
@@ -92,7 +92,7 @@ struct fd3_shader_variant {
                fd3_semantic semantic;
                uint8_t regid;
        } outputs[16];
-       bool writes_pos;
+       bool writes_pos, writes_psize;
 
        /* vertices/inputs: */
        unsigned inputs_count;