Add code to preserve processor mode when a prefetch

abort is signalled after processing a breakpoint.

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index 32e1056ac3bb38e04d0b54a120f7177859ce60be..4b1331a766ae566ff1ded33fb19a92ed93092620 100644 (file)
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,5 +1,8 @@
 2001-02-14  Nick Clifton  <nickc@redhat.com>
 
+       * armemu.c: Add code to preserve processor mode when a prefetch
+       abort is signalled after processing a breakpoint.
+
        * wrapper.c (sim_create_inferior): Reset processor into ARM mode
        for any machine type except the early ARMs.
 

diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 166f3aaf40d328a7b4940fe8aa614ff940f80153..f0a6103357151cb5b0576e0a47ff4bed4f6742a1 100644 (file)
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -1340,6 +1340,7 @@ ARMul_Emulate26 (register ARMul_State * state)
                    {
                      ARMword value;
                      extern int SWI_vector_installed;
+                     int in_thumb_mode;
 
                      /* Hardware is allowed to optionally override this
                         instruction and treat it as a breakpoint.  Since
@@ -1377,7 +1378,17 @@ ARMul_Emulate26 (register ARMul_State * state)
                            }
                        }
 
+                     /* We must signal an abort to mark the next instruction as
+                        invalid and in need of refetching.  This is because if this
+                        the instruction was a breakpoint inserted by the debugger,
+                        the instruction could be changed back to its original value.
+                        The abort however, will automatically reset the processor into
+                        ARM mode, so we have to preserve the mode flag and resort it
+                        after singalling the abort.  */
+                     in_thumb_mode = TFLAG;
                      ARMul_Abort (state, ARMul_PrefetchAbortV);
+                     ASSIGNT (in_thumb_mode);
+                     
                      break;
                    }
                }