replace % operator with rv_rem
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 14 Oct 2018 04:49:05 +0000 (05:49 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 14 Oct 2018 04:49:05 +0000 (05:49 +0100)
riscv/insns/rem.h
riscv/insns/remu.h
riscv/insns/remuw.h
riscv/insns/remw.h
riscv/sv_insn_redirect.cc
riscv/sv_insn_redirect.h

index 858799577ccbc4875aa38932455c5d54261b545b..5464915c3958ad63a6a29c4fd5094818d07da3e2 100644 (file)
@@ -6,4 +6,4 @@ if(rhs == 0)
 else if(lhs == INT64_MIN && rhs == -1)
   WRITE_RD(0);
 else
-  WRITE_RD(sext_xlen(lhs % rhs));
+  WRITE_RD(sext_xlen(rv_rem(lhs, rhs)));
index e74774cc23d01baf018971b9b9e75a44d6001025..8c59de64284d27c1a588b328c79cb562a30e544d 100644 (file)
@@ -4,4 +4,4 @@ reg_t rhs = zext_xlen(RS2);
 if(rhs == 0)
   WRITE_RD(sext_xlen(RS1));
 else
-  WRITE_RD(sext_xlen(lhs % rhs));
+  WRITE_RD(sext_xlen(rv_rem(lhs, rhs)));
index b239c8f32397db74e128e8139bbf028a5a3f004d..7f30d0e7bb3404bd842f8f0d39f7310fe346ba46 100644 (file)
@@ -5,4 +5,4 @@ reg_t rhs = zext32(RS2);
 if(rhs == 0)
   WRITE_RD(sext32(lhs));
 else
-  WRITE_RD(sext32(lhs % rhs));
+  WRITE_RD(sext32(rv_rem(lhs, rhs)));
index 56221ccd4e742dbe142858d0e7739c182c95818a..cf4bd4f5c35a7922c7c04c8a460d1c95b4607587 100644 (file)
@@ -5,4 +5,4 @@ sreg_t rhs = sext32(RS2);
 if(rhs == 0)
   WRITE_RD(lhs);
 else
-  WRITE_RD(sext32(lhs % rhs));
+  WRITE_RD(sext32(rv_rem(lhs, rhs)));
index 1b8e4f2b195743d7843cf261c207d31352ffdf29..4f0a103c6def1bc7dfe3c901d56c87edb5d5d0dd 100644 (file)
@@ -237,6 +237,16 @@ reg_t sv_proc_t::rv_div(reg_t lhs, reg_t rhs)
     return lhs / rhs;
 }
 
+sreg_t sv_proc_t::rv_rem(sreg_t lhs, sreg_t rhs)
+{
+    return lhs % rhs;
+}
+
+reg_t sv_proc_t::rv_rem(reg_t lhs, reg_t rhs)
+{
+    return lhs % rhs;
+}
+
 reg_t sv_proc_t::rv_mul(reg_t lhs, reg_t rhs)
 {
     return lhs * rhs;
index af2864632f0b73115ac71d74e3d0ee7fa3cce6d7..5aeccd150f1c713366fa8fd608f925063f422e20 100644 (file)
@@ -98,6 +98,8 @@ public:
     reg_t rv_sub(reg_t lhs, reg_t rhs);
     reg_t rv_div(reg_t lhs, reg_t rhs);
     sreg_t rv_div(sreg_t lhs, sreg_t rhs);
+    reg_t rv_rem(reg_t lhs, reg_t rhs);
+    sreg_t rv_rem(sreg_t lhs, sreg_t rhs);
     reg_t rv_mul(reg_t lhs, reg_t rhs);
     reg_t rv_and(reg_t lhs, reg_t rhs);
     reg_t rv_or(reg_t lhs, reg_t rhs);