Faults: Replace calls to genMachineCheckFault with M5PanicFault.

diff --git a/src/arch/alpha/faults.hh b/src/arch/alpha/faults.hh
index edac1cda611a38b83821804cbc325a4d3782cb15..3da97ccb426e13af2395929e4848006a8f2976de 100644 (file)
--- a/src/arch/alpha/faults.hh
+++ b/src/arch/alpha/faults.hh
@@ -84,11 +84,6 @@ class AlignmentFault : public AlphaFault
     bool isAlignmentFault() const {return true;}
 };
 
-static inline Fault genMachineCheckFault()
-{
-    return new MachineCheckFault;
-}
-
 class ResetFault : public AlphaFault
 {
   private:

diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index fbe188973f04787a46fa7aa7e4ce36b3bda1abde..b211c49238e183202f1fc61c80d74e4e567d5f73 100644 (file)
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -36,6 +36,7 @@
 #include "arch/alpha/faults.hh"
 #include "arch/alpha/pagetable.hh"
 #include "arch/alpha/tlb.hh"
+#include "arch/generic/debugfaults.hh"
 #include "base/inifile.hh"
 #include "base/str.hh"
 #include "base/trace.hh"
@@ -434,8 +435,9 @@ TLB::translateInst(RequestPtr req, ThreadContext *tc)
     }
 
     // check that the physical address is ok (catch bad physical addresses)
-    if (req->getPaddr() & ~PAddrImplMask)
-        return genMachineCheckFault();
+    if (req->getPaddr() & ~PAddrImplMask) {
+        return new MachineCheckFault();
+    }
 
     return checkCacheability(req, true);
 
@@ -562,8 +564,9 @@ TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
     }
 
     // check that the physical address is ok (catch bad physical addresses)
-    if (req->getPaddr() & ~PAddrImplMask)
-        return genMachineCheckFault();
+    if (req->getPaddr() & ~PAddrImplMask) {
+        return new MachineCheckFault();
+    }
 
     return checkCacheability(req);
 }

diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh
index fe1258a16fe771848077d16e1fff2ba925a80684..2d025cc949661285b32624aa7f409db7176b4476 100644 (file)
--- a/src/arch/arm/faults.hh
+++ b/src/arch/arm/faults.hh
@@ -242,11 +242,6 @@ class FlushPipe : public ArmFaultVals<FlushPipe>
             StaticInstPtr inst = StaticInst::nullStaticInstPtr);
 };
 
-static inline Fault genMachineCheckFault()
-{
-    return new Reset();
-}
-
 // A fault that flushes the pipe, excluding the faulting instructions
 class ArmSev : public ArmFaultVals<ArmSev>
 {

diff --git a/src/arch/mips/faults.hh b/src/arch/mips/faults.hh
index e78abbb433951a3556b22c71bde205087d8ff55a..89b6924c6ed5c5b59b6a87b610a37513c317ad95 100644 (file)
--- a/src/arch/mips/faults.hh
+++ b/src/arch/mips/faults.hh
@@ -128,11 +128,6 @@ class MachineCheckFault : public MipsFault<MachineCheckFault>
     bool isMachineCheckFault() { return true; }
 };
 
-static inline Fault genMachineCheckFault()
-{
-    return new MachineCheckFault;
-}
-
 class ResetFault : public MipsFault<ResetFault>
 {
   public:

diff --git a/src/arch/power/faults.hh b/src/arch/power/faults.hh
index 6aedd7e0059d294be8186c96515193dcf99fbdca..a99ae7b307ee7a9ba5b3dc95e75205341bb60a86 100644 (file)
--- a/src/arch/power/faults.hh
+++ b/src/arch/power/faults.hh
@@ -85,13 +85,6 @@ class AlignmentFault : public PowerFault
     }
 };
 
-
-static inline Fault
-genMachineCheckFault()
-{
-    return new MachineCheckFault();
-}
-
 } // namespace PowerISA
 
 #endif // __ARCH_POWER_FAULTS_HH__

diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh
index 31209440f595158ae437c608ffb3fdf10a0994c7..88c269d66ccf098f15ea6d4e64b41a7c0e96c3e2 100644 (file)
--- a/src/arch/sparc/faults.hh
+++ b/src/arch/sparc/faults.hh
@@ -287,13 +287,6 @@ class TrapInstruction : public EnumeratedFault<TrapInstruction>
 #endif
 };
 
-static inline Fault
-genMachineCheckFault()
-{
-    return new InternalProcessorError;
-}
-
-
 } // namespace SparcISA
 
 #endif // __SPARC_FAULTS_HH__

diff --git a/src/arch/x86/faults.hh b/src/arch/x86/faults.hh
index 2e8889404b66283d7c5270e2ecc5427e315332c9..fba2a26b5cae99b3429218e065fa55c409f7946b 100644 (file)
--- a/src/arch/x86/faults.hh
+++ b/src/arch/x86/faults.hh
@@ -363,11 +363,6 @@ namespace X86ISA
         {}
     };
 
-    static inline Fault genMachineCheckFault()
-    {
-        return new MachineCheck;
-    }
-
     class SIMDFloatingPointFault : public X86Fault
     {
       public:

diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index af926759c95a20c369de9f995b007b9c699de5c2..3c1af4533b36cb98ac64ba34e340aa8015ef5a04 100644 (file)
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -38,6 +38,7 @@
 #include <queue>
 
 #include "arch/faults.hh"
+#include "arch/generic/debugfaults.hh"
 #include "arch/isa_traits.hh"
 #include "arch/locked_mem.hh"
 #include "arch/mmapped_ipr.hh"
@@ -568,7 +569,9 @@ LSQUnit<Impl>::read(Request *req, Request *sreqLow, Request *sreqHigh,
             delete sreqLow;
             delete sreqHigh;
         }
-        return TheISA::genMachineCheckFault();
+        return new GenericISA::M5PanicFault(
+                "Uncachable load [sn:%llx] PC %s\n",
+                load_inst->seqNum, load_inst->pcState());
     }
 
     // Check the SQ for any previous stores that might lead to forwarding

diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 77ce705bc6decd43ae744e11de0e217d39b1c8b2..acef6ec9d0c18acb1864f6d530417ee80f66c2f8 100644 (file)
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -41,6 +41,7 @@
  *          Korey Sewell
  */
 
+#include "arch/generic/debugfaults.hh"
 #include "arch/locked_mem.hh"
 #include "base/str.hh"
 #include "config/the_isa.hh"
@@ -539,7 +540,10 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
 
                         ++lsqMemOrderViolation;
 
-                        return TheISA::genMachineCheckFault();
+                        return new GenericISA::M5PanicFault(
+                                "Detected fault with inst [sn:%lli] and "
+                                "[sn:%lli] at address %#x\n",
+                                inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
                     }
                 }
 
@@ -563,7 +567,9 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst)
 
                 ++lsqMemOrderViolation;
 
-                return TheISA::genMachineCheckFault();
+                return new GenericISA::M5PanicFault("Detected fault with "
+                        "inst [sn:%lli] and [sn:%lli] at address %#x\n",
+                        inst->seqNum, ld_inst->seqNum, ld_eff_addr1);
             }
         }