optionally support parallel building

diff --git a/Makefile b/Makefile
index cca51a6c20d02ca083626fa35b9a29b6978565c5..2d764b5bdd63c0bdeac93eb1292b48c5839e004d 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -11,6 +11,9 @@ endif
 CFLAGS=-O3 -Wall $(CFLAG_ARCH_OPT) -mtune=native
 CXXFLAGS=-g -g
 
+# Use this for parallel builds
+JOBS= $(shell nproc)
+
 GHDLSYNTH ?= ghdl.so
 YOSYS     ?= yosys
 NEXTPNR   ?= nextpnr-ecp5
@@ -257,7 +260,6 @@ microwatt.json: $(synth_files) $(RAM_INIT_FILE)
 microwatt.v: $(synth_files) $(RAM_INIT_FILE)
        $(YOSYS) -m $(GHDLSYNTH) -p "ghdl --std=08 --no-formal $(GHDL_IMAGE_GENERICS) $(GHDL_TARGET_GENERICS) $(synth_files) -e toplevel; write_verilog $@"
 
-THREADS=1 # How many threads should be used for verilator binary
 THREADS=3 # How many threads should be used for verilator binary, 3 is optimal
 # Need to investigate why yosys is hitting verilator warnings, and eventually turn on -Wall
 # --top-module toplevel
@@ -284,7 +286,7 @@ microwatt-verilator: microwatt.v verilator/microwatt-verilator.cpp verilator/uar
        #    --output-split 5000 \
        #    --output-split-cfuncs 500 \
        #    --output-split-ctrace 500 \
-       make -C obj_dir -f Vmicrowatt.mk
+       make -j $(JOBS) -C obj_dir -f Vmicrowatt.mk
        @cp -f obj_dir/microwatt-verilator microwatt-verilator
 
 microwatt_out.config: microwatt.json $(LPF)