(no commit message)

diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn
index 70975e582312008c98e6ec0ecb812c47eb390a04..607ff6f8454f99a903692854d115d3701a9c6e6e 100644 (file)
--- a/openpower/sv/av_opcodes.mdwn
+++ b/openpower/sv/av_opcodes.mdwn
@@ -24,8 +24,8 @@ In-advance, the summary of base scalar operations that need to be added is:
 | abs-accumulate| result += abs (src1, src2) |
 | signed min   | result = (src1 < src2) ? src1 : src2 use bitmanip |
 | signed max   | result = (src1 > src2) ? src1 : src2  use bitmanip |
-| bitwise sel  | (a ? b : c) - use bitmanip ternary |
-| int/fp move  | GPR(RT) = FPR(FRA) and FPR(FRT) = GPR(RA) |
+| bitwise sel  | (a ? b : c) - use [[sv/bitmanip]] ternary |
+| int/fp move  | covered by [[sv/int_fp_mv]] |
 
 All other capabilities (saturate in particular) are achieved with [[sv/svp64]] modes and swizzle.  Note that minmax and ternary are added in bitmanip.