brw_mark_surface_used(&prog_data->base, surf_index);
}
+void
+gen8_vec4_generator::generate_untyped_surface_read(vec4_instruction *ir,
+ struct brw_reg dst,
+ struct brw_reg surf_index)
+{
+ assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
+ surf_index.type == BRW_REGISTER_TYPE_UD);
+
+ gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
+ gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
+ gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
+ gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
+ surf_index.dw1.ud,
+ HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ,
+ 0xe, /* enable only the R channel */
+ ir->mlen,
+ 1,
+ ir->header_present,
+ false);
+
+ brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+}
+
+
void
gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
struct brw_reg dst,
break;
case SHADER_OPCODE_UNTYPED_SURFACE_READ:
- assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_SURFACE_READ");
+ generate_untyped_surface_read(ir, dst, src[0]);
break;
case VS_OPCODE_UNPACK_FLAGS_SIMD4X2: