i965/vec4: Port untyped surface reads support to Broadwell.
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 18 Apr 2014 02:22:33 +0000 (19:22 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Thu, 1 May 2014 07:24:10 +0000 (00:24 -0700)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77221
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_vec4.h
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp

index 9919a8915cadeca8047c9fcbc2a156f9bbbbe7a6..3bfe8e4d834258127c7f3cef9fea3ffca333055c 100644 (file)
@@ -783,6 +783,9 @@ private:
                                     struct brw_reg dst,
                                     struct brw_reg index,
                                     struct brw_reg offset);
+   void generate_untyped_surface_read(vec4_instruction *ir,
+                                      struct brw_reg dst,
+                                      struct brw_reg surf_index);
 
    struct brw_vec4_prog_data *prog_data;
 
index dd3035c722115a7d2afa44f71b84cfc33da1af07..1c4823d9254cd51c71e92407274b8552301a989c 100644 (file)
@@ -455,6 +455,30 @@ gen8_vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
    brw_mark_surface_used(&prog_data->base, surf_index);
 }
 
+void
+gen8_vec4_generator::generate_untyped_surface_read(vec4_instruction *ir,
+                                                   struct brw_reg dst,
+                                                   struct brw_reg surf_index)
+{
+   assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
+          surf_index.type == BRW_REGISTER_TYPE_UD);
+
+   gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
+   gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
+   gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
+   gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
+                       surf_index.dw1.ud,
+                       HSW_DATAPORT_DC_PORT1_UNTYPED_SURFACE_READ,
+                       0xe, /* enable only the R channel */
+                       ir->mlen,
+                       1,
+                       ir->header_present,
+                       false);
+
+   brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+}
+
+
 void
 gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
                                                struct brw_reg dst,
@@ -765,7 +789,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       break;
 
    case SHADER_OPCODE_UNTYPED_SURFACE_READ:
-      assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_SURFACE_READ");
+      generate_untyped_surface_read(ir, dst, src[0]);
       break;
 
    case VS_OPCODE_UNPACK_FLAGS_SIMD4X2: