Fix spacing

diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v
index e2bf3c8544cdbd7338fc1689ce5b89c7639377b5..01b10f392a8a328e460acb5c097f9cd49de18a28 100644 (file)
--- a/techlibs/ecp5/cells_sim.v
+++ b/techlibs/ecp5/cells_sim.v
@@ -116,7 +116,7 @@ module TRELLIS_DPR16X4 (
        input        WCK,
        input  [3:0] RAD,
        /* (* abc_arrival=<TODO> *) */
-    output [3:0] DO
+       output [3:0] DO
 );
        parameter WCKMUX = "WCK";
        parameter WREMUX = "WRE";