Merge with head.

--HG--
extra : convert_revision : f677debfd636d79bc5097eb45331601d3253743d

diff --git a/src/arch/mips/regfile/int_regfile.cc b/src/arch/mips/regfile/int_regfile.cc
new file mode 100644 (file)
index 0000000..70c71fa
--- /dev/null
+++ b/src/arch/mips/regfile/int_regfile.cc
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ *          Korey Sewell
+ */
+
+#include "arch/mips/regfile/int_regfile.hh"
+#include "sim/serialize.hh"
+
+using namespace MipsISA;
+using namespace std;
+
+void
+IntRegFile::serialize(std::ostream &os)
+{
+    SERIALIZE_ARRAY(regs, NumIntRegs);
+}
+
+void
+IntRegFile::unserialize(Checkpoint *cp, const std::string &section)
+{
+    UNSERIALIZE_ARRAY(regs, NumIntRegs);
+}

diff --git a/src/arch/mips/regfile/regfile.cc b/src/arch/mips/regfile/regfile.cc
new file mode 100644 (file)
index 0000000..2b778e6
--- /dev/null
+++ b/src/arch/mips/regfile/regfile.cc
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Gabe Black
+ *          Korey Sewell
+ */
+
+#include "arch/mips/regfile/regfile.hh"
+#include "sim/serialize.hh"
+
+using namespace MipsISA;
+using namespace std;
+
+void
+RegFile::serialize(std::ostream &os)
+{
+    intRegFile.serialize(os);
+    //SERIALIZE_ARRAY(floatRegFile, NumFloatRegs);
+    //SERIALZE_ARRAY(miscRegFile);
+    //SERIALIZE_SCALAR(miscRegs.fpcr);
+    //SERIALIZE_SCALAR(miscRegs.lock_flag);
+    //SERIALIZE_SCALAR(miscRegs.lock_addr);
+    SERIALIZE_SCALAR(pc);
+    SERIALIZE_SCALAR(npc);
+    SERIALIZE_SCALAR(nnpc);
+}
+
+void
+RegFile::unserialize(Checkpoint *cp, const std::string &section)
+{
+    intRegFile.unserialize(cp, section);
+    //UNSERIALIZE_ARRAY(floatRegFile);
+    //UNSERIALZE_ARRAY(miscRegFile);
+    //UNSERIALIZE_SCALAR(miscRegs.fpcr);
+    //UNSERIALIZE_SCALAR(miscRegs.lock_flag);
+    //UNSERIALIZE_SCALAR(miscRegs.lock_addr);
+    UNSERIALIZE_SCALAR(pc);
+    UNSERIALIZE_SCALAR(npc);
+    UNSERIALIZE_SCALAR(nnpc);
+
+}
+
+void
+MipsISA::copyRegs(ThreadContext *src, ThreadContext *dest)
+{
+    panic("Copy Regs Not Implemented Yet\n");
+}
+
+void
+MipsISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+{
+    panic("Copy Misc. Regs Not Implemented Yet\n");
+}

diff --git a/src/arch/x86/insts/microldstop.cc b/src/arch/x86/insts/microldstop.cc
index 9628256e44d6b1a965f6fedc17a73dcfe4d1a4c1..9638a2ae374d88cac4988f955a74d2854338ed26 100644 (file)
--- a/src/arch/x86/insts/microldstop.cc
+++ b/src/arch/x86/insts/microldstop.cc
@@ -64,16 +64,40 @@ namespace X86ISA
             const SymbolTable *symtab) const
     {
         std::stringstream response;
+        bool someAddr = false;
 
         printMnemonic(response, instMnem, mnemonic);
-        printDestReg(response, 0, dataSize);
+        if(flags[IsLoad])
+            printDestReg(response, 0, dataSize);
+        else
+            printSrcReg(response, 2, dataSize);
         response << ", ";
         printSegment(response, segment);
-        ccprintf(response, ":[%d*", scale);
-        printSrcReg(response, 0, addressSize);
-        response << " + ";
-        printSrcReg(response, 1, addressSize);
-        ccprintf(response, " + %#x]", disp);
+        response << ":[";
+        if(scale != 0 && _srcRegIdx[0] != ZeroReg)
+        {
+            if(scale != 1)
+                ccprintf(response, "%d*", scale);
+            printSrcReg(response, 0, addressSize);
+            someAddr = true;
+        }
+        if(_srcRegIdx[1] != ZeroReg)
+        {
+            if(someAddr)
+                response << " + ";
+            printSrcReg(response, 1, addressSize);
+            someAddr = true;
+        }
+        if(disp != 0)
+        {
+            if(someAddr)
+                response << " + ";
+            ccprintf(response, "%#x", disp);
+            someAddr = true;
+        }
+        if(!someAddr)
+            response << "0";
+        response << "]";
         return response.str();
     }
 }

diff --git a/util/statetrace/arch/tracechild_amd64.cc b/util/statetrace/arch/tracechild_amd64.cc
index 088e547e42db6a58f73d3f7c93b1920576971c3a..22292397264c86d3385b7eab76dbb7fb29b78fe4 100644 (file)
--- a/util/statetrace/arch/tracechild_amd64.cc
+++ b/util/statetrace/arch/tracechild_amd64.cc
@@ -160,6 +160,7 @@ ostream & AMD64TraceChild::outputStartState(ostream & os)
 {
     uint64_t sp = getSP();
     uint64_t pc = getPC();
+    uint64_t highestInfo = 0;
     char obuf[1024];
     sprintf(obuf, "Initial stack pointer = 0x%016llx\n", sp);
     os << obuf;
@@ -180,6 +181,9 @@ ostream & AMD64TraceChild::outputStartState(ostream & os)
         cargv = ptrace(PTRACE_PEEKDATA, pid, sp, 0);
         sprintf(obuf, "0x%016llx: argv[%d] = 0x%016llx\n",
                 sp, argCount++, cargv);
+        if(cargv)
+            if(highestInfo < cargv)
+                highestInfo = cargv;
         os << obuf;
         sp += 8;
     } while(cargv);
@@ -230,7 +234,7 @@ ostream & AMD64TraceChild::outputStartState(ostream & os)
         }
         sp += 8;
         clearedInitialPadding = clearedInitialPadding || buf != 0;
-    } while(!clearedInitialPadding || buf != 0);
+    } while(!clearedInitialPadding || buf != 0 || sp <= highestInfo);
     return os;
 }