rs6000: Make lwa_operand use any_memory_operand

Testcase from comex, see https://lwn.net/Articles/793932/ .

	* config/rs6000/predicates.md (lwa_operand): Allow volatile memory.

gcc/testsuite/
	* gcc.target/powerpc/volatile-mem.c: New testcase.

From-SVN: r273631

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 58220e6d264b3162859f942094985c7afa026a62..459c869796c0596d4c3db0aef81b7edf53c6d457 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * config/rs6000/predicates.md (lwa_operand): Allow volatile memory.
+
 2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/predicates.md (volatile_mem_operand): Modernize syntax.

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 13c7c02f27aab695a04671fcf576a3adbbf8d72e..23d626bc0c40aec5d44e9266bc21bef7f1df07d2 100644 (file)
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -929,7 +929,7 @@
 
   if (gpc_reg_operand (inner, mode))
     return true;
-  if (!memory_operand (inner, mode))
+  if (!any_memory_operand (inner, mode))
     return false;
 
   addr = XEXP (inner, 0);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cd553db4b39e3dc92da15db9f64730dae37c48b2..fc9b4c8d24fa067cfb2d0562e931e7b378d5bfad 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2019-07-20  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * gcc.target/powerpc/volatile-mem.c: New testcase.
+
 2019-07-20  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/91204

diff --git a/gcc/testsuite/gcc.target/powerpc/volatile-mem.c b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c
new file mode 100644 (file)
index 0000000..c8a7444
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O2 -std=c11" } */
+/* { dg-require-effective-target lp64 } */
+
+/* This tests if the instructions used for C atomic are optimised properly
+   as atomic by the target code, too.  */
+
+#include <stdatomic.h>
+
+int load(_Atomic int *ptr)
+{
+        return atomic_load_explicit(ptr, memory_order_relaxed);
+}
+
+/* There should be only two machine instructions, an lwa and a blr: */
+/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 2 } } */
+/* { dg-final { scan-assembler-times {\mlwa\M} 1 } } */