i965/barrier: Do the correct flushes for texture updates
authorJason Ekstrand <jason.ekstrand@intel.com>
Thu, 15 Jun 2017 05:27:20 +0000 (22:27 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 13 Oct 2017 02:58:40 +0000 (19:58 -0700)
Texture uploads and downloads may go through the render pipe which may
result in texturing from or rendering to the texture or the PBO.  We
need to flush accordingly.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_program.c

index 9ec2917c90e8d7a5a601da458a6adb49bda440ce..3743fa9b5eb849e1120eddd9d3b5af4ffd69f5b5 100644 (file)
@@ -268,8 +268,10 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers)
    if (barriers & GL_TEXTURE_FETCH_BARRIER_BIT)
       bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
 
-   if (barriers & GL_TEXTURE_UPDATE_BARRIER_BIT)
-      bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
+   if (barriers & (GL_TEXTURE_UPDATE_BARRIER_BIT |
+                   GL_PIXEL_BUFFER_BARRIER_BIT))
+      bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
+               PIPE_CONTROL_RENDER_TARGET_FLUSH);
 
    if (barriers & GL_FRAMEBUFFER_BARRIER_BIT)
       bits |= (PIPE_CONTROL_DEPTH_CACHE_FLUSH |