add slide
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 11 Jul 2018 05:11:37 +0000 (06:11 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 11 Jul 2018 05:11:43 +0000 (06:11 +0100)
shakti/m_class/libre_riscv_chennai_2018.tex

index 632ae21d0bf1a4a8346ac31a3d0805e05fb24207..0a2f8ab24fc8418a4da53874e191ecea1fc2b9ec 100644 (file)
 
 \frame{\frametitle{Interfaces, Block Diagram, of the Libre-RISCV SoC}
  \begin{center}
-  \includegraphics[height=2.5in]{../shakti_libre_riscv.jpg}\\
-  {\bf Complexity is in the power management }
+  \includegraphics[height=2.1in]{../shakti_libre_riscv.jpg}\\
+  {\bf Separate Power Domains for GPIO banks, Variable voltages
+    required, low-power sleep states etc.  Quite involved!}
  \end{center}
 }
 
+\frame{\frametitle{Hardware / Development Complexity Comparison}
+
+ \begin{itemize}
+   \item {\bf Server}: relatively easy. PCIe, RapidIO, SATA, (1/10) GbE,
+                DDR3/4 or HyperRAM. No multiplexing: all interfaces dedicated
+                and high-speed differential pairs
+                \vspace{8pt}
+   \item {\bf Desktop}: really just a variant of Server.
+            Graphics is a PCIe Card (except if integrated).  Peripherals
+            often done in dedicated external ICs ("Southbridge")
+            \vspace{8pt}
+   \item {\bf Embedded}: also pretty easy.  Really needs a pinmux.  Low clock
+         rate, low power mode.  Example: Freedom U310.
+         \vspace{8pt}
+   \item {\bf Mobile}: HARD. Performance/Watt matters $=>$ variable core
+                voltage domains {\it per core}.  Number of pins matters.  Cost
+                matters.  Pinmux absolutely critical.
+            \vspace{8pt}
+  \end{itemize}
+}
+
+
 \frame{\frametitle{TODO}
 
  \begin{itemize}