r600_context_pipe_state_set_sampler_border(ctx, state, offset);
}
-struct r600_resource *r600_context_reg_bo(struct r600_context *ctx, unsigned offset)
-{
- struct r600_range *range;
- struct r600_block *block;
- unsigned id;
-
- range = &ctx->range[CTX_RANGE_ID(offset)];
- block = range->blocks[CTX_BLOCK_ID(offset)];
- offset -= block->start_offset;
- id = block->pm4_bo_index[offset >> 2];
- if (block->reloc[id].bo) {
- return block->reloc[id].bo;
- }
- return NULL;
-}
-
void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block)
{
struct radeon_winsys_cs *cs = ctx->cs;
/*
* r600_hw_context.c
*/
-struct r600_resource *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
unsigned opcode, unsigned offset_base);
void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block);