self.comb += [
Record.connect(sender.source, packetizer.sink),
Record.connect(packetizer.source, source),
- source.length.eq(sender.source.wcount*4 + 4 + etherbone_record_header_len), # XXX improve this
+ source.length.eq(sender.source.wcount*4 + 4 + etherbone_record_header_len), # XXX improve this
source.ip_address.eq(last_ip_address)
]
if endianness is "big":
class LiteEthIPV4Checksum(Module):
def __init__(self, words_per_clock_cycle=1, skip_checksum=False):
- self.reset = Signal() # XXX FIXME InsertReset generates incorrect verilog
- self.ce = Signal() # XXX FIXME InsertCE generates incorrect verilog
+ self.reset = Signal() # XXX FIXME InsertReset generates incorrect verilog
+ self.ce = Signal() # XXX FIXME InsertCE generates incorrect verilog
self.header = Signal(ipv4_header_len*8)
self.value = Signal(16)
self.done = Signal()
packetizer.sink.src_port.eq(sink.src_port),
packetizer.sink.dst_port.eq(sink.dst_port),
packetizer.sink.length.eq(sink.length + udp_header_len),
- packetizer.sink.checksum.eq(0), # Disabled (MAC CRC is enough)
+ packetizer.sink.checksum.eq(0), # Disabled (MAC CRC is enough)
packetizer.sink.data.eq(sink.data)
]
def generate_packet(seed, length):
r = []
for i in range(length):
- r.append(seed_to_data(seed, True)%0xff) # XXX FIXME
+ r.append(seed_to_data(seed, True)%0xff) # XXX FIXME
seed += 1
return r, seed
while tx_seed < test_size:
tx_packet, tx_seed = generate_packet(tx_seed, 1024)
tx_sock.sendto(bytes(tx_packet), (fpga_ip, udp_port))
- time.sleep(0.001) # XXX: FIXME, Python limitation?
+ time.sleep(0.001) # XXX: FIXME, Python limitation?
receive_thread = threading.Thread(target=receive)
receive_thread.start()
self.crc_error = Signal()
slotbits = max(log2_int(nslots), 1)
- lengthbits = log2_int(depth*4) # length in bytes
+ lengthbits = log2_int(depth*4) # length in bytes
self._slot = CSRStatus(slotbits)
self._length = CSRStatus(lengthbits)
self.source = source = Source(eth_phy_description(dw))
slotbits = max(log2_int(nslots), 1)
- lengthbits = log2_int(depth*4) # length in bytes
+ lengthbits = log2_int(depth*4) # length in bytes
self.lengthbits = lengthbits
self._start = CSR()
counter = RenameClockDomains(Counter(32), "eth_rx")
self.submodules += counter
self.comb += [
- counter.reset.eq(self._reset.storage), #slow, don't need CDC
+ counter.reset.eq(self._reset.storage), # slow, don't need CDC
counter.ce.eq(1),
]
self.specials += MultiReg(counter.value, self._value.status)
class ARP(Module):
- def __init__(self, mac, mac_address, ip_address, debug=False):
+ def __init__(self, mac, mac_address, ip_address, debug=False):
self.mac = mac
self.mac_address = mac_address
self.ip_address = ip_address
class Etherbone(Module):
- def __init__(self, udp, debug=False):
+ def __init__(self, udp, debug=False):
self.udp = udp
self.debug = debug
self.tx_packets = []
print_etherbone(packet)
udp_packet = udp.UDPPacket(packet)
udp_packet.src_port = 0x1234 # XXX
- udp_packet.dst_port = 20000 # XXX
+ udp_packet.dst_port = 20000 # XXX
udp_packet.length = len(packet)
udp_packet.checksum = 0
self.udp.send(udp_packet)
class ICMP(Module):
- def __init__(self, ip, ip_address, debug=False):
+ def __init__(self, ip, ip_address, debug=False):
self.ip = ip
self.ip_address = ip_address
self.debug = debug
ip_packet.fragment_offset = 0
ip_packet.ttl = 0x80
ip_packet.sender_ip = self.ip_address
- ip_packet.target_ip = 0x12345678 # XXX
+ ip_packet.target_ip = 0x12345678 # XXX
ip_packet.checksum = 0
ip_packet.protocol = icmp_protocol
self.ip.send(ip_packet)
class IP(Module):
- def __init__(self, mac, mac_address, ip_address, debug=False, loopback=False):
+ def __init__(self, mac, mac_address, ip_address, debug=False, loopback=False):
self.mac = mac
self.mac_address = mac_address
self.ip_address = ip_address
print_ip(">>>>>>>>")
print_ip(packet)
mac_packet = mac.MACPacket(packet)
- mac_packet.target_mac = 0x12345678abcd # XXX
+ mac_packet.target_mac = 0x12345678abcd # XXX
mac_packet.sender_mac = self.mac_address
mac_packet.ethernet_type = ethernet_type_ip
self.mac.send(mac_packet)
self.preamble_error = self.check_remove_preamble()
self.crc_error = self.check_remove_crc()
if self.crc_error or self.preamble_error:
- raise ValueError # XXX handle this properly
+ raise ValueError # XXX handle this properly
else:
self.decode_remove_header()
class MAC(Module):
- def __init__(self, phy, debug=False, loopback=False):
+ def __init__(self, phy, debug=False, loopback=False):
self.phy = phy
self.debug = debug
self.loopback = loopback
if self.arp_callback is not None:
self.arp_callback(packet)
else:
- raise ValueError # XXX handle this properly
+ raise ValueError # XXX handle this properly
if __name__ == "__main__":
from misoclib.com.liteeth.test.model.dumps import *
class UDP(Module):
- def __init__(self, ip, ip_address, debug=False, loopback=False):
+ def __init__(self, ip, ip_address, debug=False, loopback=False):
self.ip = ip
self.ip_address = ip_address
self.debug = debug
ip_packet.fragment_offset = 0
ip_packet.ttl = 0x80
ip_packet.sender_ip = self.ip_address
- ip_packet.target_ip = 0x12345678 # XXX
+ ip_packet.target_ip = 0x12345678 # XXX
ip_packet.checksum = 0
ip_packet.protocol = udp_protocol
self.ip.send(ip_packet)
projects / litex.git / commitdiff