[22/77] Replace !VECTOR_MODE_P with is_a <scalar_int_mode>

This patch replaces some checks of !VECTOR_MODE_P with checks
of is_a <scalar_int_mode>, in cases where the scalar integer
modes were the only useful alternatives left.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* simplify-rtx.c (simplify_binary_operation_1): Use
	is_a <scalar_int_mode> instead of !VECTOR_MODE_P.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251474

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1e3b794f029b0d5a5cf8a03356910d64501cd0e5..f12544024d70fb57caed581177ea841335822f20 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
+           Alan Hayward  <alan.hayward@arm.com>
+           David Sherwood  <david.sherwood@arm.com>
+
+       * simplify-rtx.c (simplify_binary_operation_1): Use
+       is_a <scalar_int_mode> instead of !VECTOR_MODE_P.
+
 2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
            Alan Hayward  <alan.hayward@arm.com>
            David Sherwood  <david.sherwood@arm.com>

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 88180d91d38cffd80399e795365e9accd0839cc4..bf8abdb6578e92b833f5442642d338f6debd85e3 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -2138,7 +2138,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
   rtx tem, reversed, opleft, opright;
   HOST_WIDE_INT val;
   unsigned int width = GET_MODE_PRECISION (mode);
-  scalar_int_mode int_mode;
+  scalar_int_mode int_mode, inner_mode;
 
   /* Even if we can't compute a constant result,
      there are some cases worth simplifying.  */
@@ -3374,27 +3374,24 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
         (subreg:M1 ([a|l]shiftrt:M2 (reg:M2) (const_int <c1 + c2>))
                    <low_part>).  */
       if ((code == ASHIFTRT || code == LSHIFTRT)
-         && !VECTOR_MODE_P (mode)
+         && is_a <scalar_int_mode> (mode, &int_mode)
          && SUBREG_P (op0)
          && CONST_INT_P (op1)
          && GET_CODE (SUBREG_REG (op0)) == LSHIFTRT
-         && !VECTOR_MODE_P (GET_MODE (SUBREG_REG (op0)))
+         && is_a <scalar_int_mode> (GET_MODE (SUBREG_REG (op0)),
+                                    &inner_mode)
          && CONST_INT_P (XEXP (SUBREG_REG (op0), 1))
-         && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
-             > GET_MODE_BITSIZE (mode))
+         && GET_MODE_BITSIZE (inner_mode) > GET_MODE_BITSIZE (int_mode)
          && (INTVAL (XEXP (SUBREG_REG (op0), 1))
-             == (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
-                 - GET_MODE_BITSIZE (mode)))
+             == GET_MODE_BITSIZE (inner_mode) - GET_MODE_BITSIZE (int_mode))
          && subreg_lowpart_p (op0))
        {
          rtx tmp = GEN_INT (INTVAL (XEXP (SUBREG_REG (op0), 1))
                             + INTVAL (op1));
-         machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
-         tmp = simplify_gen_binary (code,
-                                    GET_MODE (SUBREG_REG (op0)),
+         tmp = simplify_gen_binary (code, inner_mode,
                                     XEXP (SUBREG_REG (op0), 0),
                                     tmp);
-         return lowpart_subreg (mode, tmp, inner_mode);
+         return lowpart_subreg (int_mode, tmp, inner_mode);
        }
 
       if (SHIFT_COUNT_TRUNCATED && CONST_INT_P (op1))