switch_cpus[i].workload = testsys.cpu[i].workload
switch_cpus[i].clock = testsys.cpu[0].clock
- root.switch_cpus = switch_cpus
+ testsys.switch_cpus = switch_cpus
switch_cpu_list = [(testsys.cpu[i], switch_cpus[i]) for i in xrange(np)]
if options.standard_switch:
// connected to anything. Also connect old CPU's memory to new
// CPU.
Port *peer;
- if (ic->getPeer() == NULL) {
+ if (ic->getPeer() == NULL || ic->getPeer()->isDefaultPort()) {
peer = oldCPU->getPort("icache_port")->getPeer();
ic->setPeer(peer);
} else {
}
peer->setPeer(ic);
- if (dc->getPeer() == NULL) {
+ if (dc->getPeer() == NULL || dc->getPeer()->isDefaultPort()) {
peer = oldCPU->getPort("dcache_port")->getPeer();
dc->setPeer(peer);
} else {