* config/tc-armeabi.h (FPU_DEFAULT): Likewise.
* config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
the default FPU from the processor.
testsuite/
* gas/arm/attr-mcpu.d: Add -mfpu=neon.
* gas/arm/mapmisc.d: Correct expected output for .double and
.dcb.d.
+2009-05-01 Nathan Sidwell <nathan@codesourcery.com>
+
+ * config/tc-armlinux-eabi.h (FPU_DEFAULT): Default to plain VFP.
+ * config/tc-armeabi.h (FPU_DEFAULT): Likewise.
+ * config/tc-arm.c (md_begin): If FPU_DEFAULT is set, don't infer
+ the default FPU from the processor.
+
2009-05-01 Julian Brown <julian@codesourcery.com>
* config/tc-arm.c (do_t_blx): Always use BFD_RELOC_THUMB_PCREL_BLX.
}
else if (!mfpu_opt)
{
-#if !(defined (TE_LINUX) || defined (TE_NetBSD) || defined (TE_VXWORKS))
+#if !(defined (EABI_DEFAULT) || defined (TE_LINUX) \
+ || defined (TE_NetBSD) || defined (TE_VXWORKS))
/* Some environments specify a default FPU. If they don't, infer it
from the processor. */
if (mcpu_fpu_opt)
02110-1301, USA. */
/* The EABI requires the use of VFP. */
-#define FPU_DEFAULT FPU_ARCH_VFP_V2
+#define FPU_DEFAULT FPU_ARCH_VFP
#define EABI_DEFAULT EF_ARM_EABI_VER5
#define LOCAL_LABELS_DOLLAR 1
#include "te-linux.h"
/* The EABI requires the use of VFP. */
-#define FPU_DEFAULT FPU_ARCH_VFP_V2
+#define FPU_DEFAULT FPU_ARCH_VFP
#define EABI_DEFAULT EF_ARM_EABI_VER5
+2009-05-01 Nathan Sidwell <nathan@codesourcery.com>
+ Daniel Jacobowitz <dan@codesourcery.com>
+
+ * gas/arm/attr-mcpu.d: Add -mfpu=neon.
+ * gas/arm/mapmisc.d: Correct expected output for .double and
+ .dcb.d.
+
2009-04-20 Jan Beulich <jbeulich@novell.com>
* gas/i386/equ.s: Adjust.
# name: EABI attributes from command line
# source: blank.s
-# as: -mcpu=cortex-a8
+# as: -mcpu=cortex-a8 -mfpu=neon
# readelf: -A
# This test is only valid on EABI based ports.
# target: *-*-*eabi
-#as: -EL -I$srcdir/$subdir
+#as: -EL -I$srcdir/$subdir -mfpu=neon
#objdump: --syms --special-syms -d
#name: ARM Mapping Symbols for miscellaneous directives
# This test is only valid on EABI based ports.
50: e1a00000 nop \(mov r0,r0\)
54: 40200000 .word 0x40200000
58: e1a00000 nop \(mov r0,r0\)
- 5c: 400c0000 .word 0x400c0000
- 60: 00000000 .word 0x00000000
+ 5c: 00000000 .word 0x00000000
+ 60: 400c0000 .word 0x400c0000
64: e1a00000 nop \(mov r0,r0\)
- 68: 40120000 .word 0x40120000
- 6c: 00000000 .word 0x00000000
+ 68: 00000000 .word 0x00000000
+ 6c: 40120000 .word 0x40120000
70: e1a00000 nop \(mov r0,r0\)
74: 00000004 .word 0x00000004
78: 00000004 .word 0x00000004