i965: drop brw->gt in favor of devinfo->gt

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index b8e4be90ab397c8cc9b4b657d5f516a8197d2f9d..c8702cc4fe553c13b938d73c37f0c1c2eec10f8d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -858,7 +858,6 @@ brwCreateContext(gl_api api,
    brw->screen = screen;
    brw->bufmgr = screen->bufmgr;
 
-   brw->gt = devinfo->gt;
    brw->is_g4x = devinfo->is_g4x;
    brw->is_baytrail = devinfo->is_baytrail;
    brw->is_haswell = devinfo->is_haswell;

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 6ff280d3b6ccaec21ab92be487a3f59b008dcce1..a066396e8df84ac166e788f8f83d6bd879582bca 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -746,8 +746,6 @@ struct brw_context
 
    uint64_t max_gtt_map_object_size;
 
-   int gt;
-
    bool is_g4x;
    bool is_baytrail;
    bool is_haswell;

diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 906a68ead1bcfad706560572a237641db12f5f44..bd3f5738eba6fee5673fa0c1f124a737701a72e3 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -95,7 +95,7 @@ brw_write_timestamp(struct brw_context *brw, struct brw_bo *query_bo, int idx)
 
    uint32_t flags = PIPE_CONTROL_WRITE_TIMESTAMP;
 
-   if (devinfo->gen == 9 && brw->gt == 4)
+   if (devinfo->gen == 9 && devinfo->gt == 4)
       flags |= PIPE_CONTROL_CS_STALL;
 
    brw_emit_pipe_control_write(brw, flags,
@@ -111,7 +111,7 @@ brw_write_depth_count(struct brw_context *brw, struct brw_bo *query_bo, int idx)
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
    uint32_t flags = PIPE_CONTROL_WRITE_DEPTH_COUNT | PIPE_CONTROL_DEPTH_STALL;
 
-   if (devinfo->gen == 9 && brw->gt == 4)
+   if (devinfo->gen == 9 && devinfo->gt == 4)
       flags |= PIPE_CONTROL_CS_STALL;
 
    if (devinfo->gen >= 10) {

diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 0373f3a3a5c04d5f11a7f0a8509b9aa09ab1cd55..a86a151a43f6757a306aa80dde85f7e5d9f6a754 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -72,7 +72,7 @@ gen7_allocate_push_constants(struct brw_context *brw)
 
    unsigned avail_size = 16;
    unsigned multiplier =
-      (devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 2 : 1;
+      (devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 2 : 1;
 
    int stages = 2 + gs_present + 2 * tess_present;
 
@@ -181,7 +181,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size,
 {
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
    const int push_size_kB =
-      (devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16;
+      (devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 32 : 16;
 
    /* BRW_NEW_{VS,TCS,TES,GS}_PROG_DATA */
    struct brw_vue_prog_data *prog_data[4] = {

diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 3c2dc9548231adca90fd6af7dc62bea506e0e10c..39fc893357113711365fba1bd364611a8c4f71d5 100644 (file)
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -2551,7 +2551,7 @@ genX(upload_gs_state)(struct brw_context *brw)
     * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
     * Stall" bit set.
     */
-   if (brw->gt == 2 && brw->gs.enabled != active)
+   if (devinfo->gt == 2 && brw->gs.enabled != active)
       gen7_emit_cs_stall_flush(brw);
 #endif