+2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * caller-save.c (add_used_regs): Use REG_NREGS instead of
+ hard_regno_nregs.
+ * config/aarch64/aarch64.c (aarch64_split_combinev16qi): Likewise.
+ * config/arm/arm.c (output_move_neon): Likewise.
+ (arm_attr_length_move_neon): Likewise.
+ (neon_split_vcombine): Likewise.
+ * config/c6x/c6x.c (c6x_mark_reg_read): Likewise.
+ (c6x_mark_reg_written): Likewise.
+ (c6x_dwarf_register_span): Likewise.
+ * config/i386/i386.c (ix86_save_reg): Likewise.
+ * config/ia64/ia64.c (mark_reg_gr_used_mask): Likewise.
+ (rws_access_reg): Likewise.
+ * config/s390/s390.c (s390_call_saved_register_used): Likewise.
+ * mode-switching.c (create_pre_exit): Likewise.
+ * ree.c (combine_reaching_defs): Likewise.
+ (add_removable_extension): Likewise.
+ * regcprop.c (find_oldest_value_reg): Likewise.
+ (copyprop_hardreg_forward_1): Likewise.
+ * reload.c (reload_inner_reg_of_subreg): Likewise.
+ (push_reload): Likewise.
+ (combine_reloads): Likewise.
+ (find_dummy_reload): Likewise.
+ (reload_adjust_reg_for_mode): Likewise.
+ * reload1.c (find_reload_regs): Likewise.
+ (forget_old_reloads_1): Likewise.
+ (reload_reg_free_for_value_p): Likewise.
+ (reload_adjust_reg_for_temp): Likewise.
+ (emit_reload_insns): Likewise.
+ (delete_output_reload): Likewise.
+ * sel-sched.c (choose_best_reg_1): Likewise.
+ (choose_best_pseudo_reg): Likewise.
+
2017-09-12 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
{
unsigned int regno = REGNO (x);
if (HARD_REGISTER_NUM_P (regno))
- bitmap_set_range ((regset) data, regno,
- hard_regno_nregs[regno][GET_MODE (x)]);
+ bitmap_set_range ((regset) data, regno, REG_NREGS (x));
else
gcc_checking_assert (reg_renumber[regno] < 0);
}
unsigned int src1 = REGNO (operands[1]);
unsigned int src2 = REGNO (operands[2]);
machine_mode halfmode = GET_MODE (operands[1]);
- unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode);
+ unsigned int halfregs = REG_NREGS (operands[1]);
rtx destlo, desthi;
gcc_assert (halfmode == V16QImode);
gcc_assert (REG_P (reg));
regno = REGNO (reg);
- nregs = HARD_REGNO_NREGS (regno, mode) / 2;
+ nregs = REG_NREGS (reg) / 2;
gcc_assert (VFP_REGNO_OK_FOR_DOUBLE (regno)
|| NEON_REGNO_OK_FOR_QUAD (regno));
gcc_assert (VALID_NEON_DREG_MODE (mode)
gcc_assert (MEM_P (mem));
- mode = GET_MODE (reg);
addr = XEXP (mem, 0);
/* Strip off const from addresses like (const (plus (...))). */
if (GET_CODE (addr) == LABEL_REF || GET_CODE (addr) == PLUS)
{
- int insns = HARD_REGNO_NREGS (REGNO (reg), mode) / 2;
+ int insns = REG_NREGS (reg) / 2;
return insns * 4;
}
else
unsigned int src1 = REGNO (operands[1]);
unsigned int src2 = REGNO (operands[2]);
machine_mode halfmode = GET_MODE (operands[1]);
- unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode);
+ unsigned int halfregs = REG_NREGS (operands[1]);
rtx destlo, desthi;
if (src1 == dest && src2 == dest + halfregs)
c6x_mark_reg_read (rtx reg, bool cross)
{
unsigned regno = REGNO (reg);
- unsigned nregs = hard_regno_nregs[regno][GET_MODE (reg)];
+ unsigned nregs = REG_NREGS (reg);
while (nregs-- > 0)
c6x_mark_regno_read (regno + nregs, cross);
c6x_mark_reg_written (rtx reg, int cycles)
{
unsigned regno = REGNO (reg);
- unsigned nregs = hard_regno_nregs[regno][GET_MODE (reg)];
+ unsigned nregs = REG_NREGS (reg);
while (nregs-- > 0)
ss.reg_set_in_cycle[regno + nregs] = cycles;
rtx p;
regno = REGNO (rtl);
- nregs = HARD_REGNO_NREGS (regno, GET_MODE (rtl));
+ nregs = REG_NREGS (rtl);
if (nregs == 1)
return NULL_RTX;
if (reg)
{
unsigned int i = REGNO (reg);
- unsigned int nregs = hard_regno_nregs[i][GET_MODE (reg)];
+ unsigned int nregs = REG_NREGS (reg);
while (nregs-- > 0)
if ((i + nregs) == regno)
return false;
if (reg)
{
i = REGNO (reg);
- nregs = hard_regno_nregs[i][GET_MODE (reg)];
+ nregs = REG_NREGS (reg);
while (nregs-- > 0)
if ((i + nregs) == regno)
return false;
unsigned int regno = REGNO (reg);
if (regno < 32)
{
- unsigned int i, n = hard_regno_nregs[regno][GET_MODE (reg)];
+ unsigned int i, n = REG_NREGS (reg);
for (i = 0; i < n; ++i)
current_frame_info.gr_used_mask |= 1 << (regno + i);
}
rws_access_reg (rtx reg, struct reg_flags flags, int pred)
{
int regno = REGNO (reg);
- int n = HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg));
+ int n = REG_NREGS (reg);
if (n == 1)
return rws_access_regno (regno, flags, pred);
if (REG_P (parm_rtx))
{
- for (reg = 0;
- reg < HARD_REGNO_NREGS (REGNO (parm_rtx), GET_MODE (parm_rtx));
- reg++)
+ for (reg = 0; reg < REG_NREGS (parm_rtx); reg++)
if (!call_used_regs[reg + REGNO (parm_rtx)])
return true;
}
gcc_assert (REG_P (r));
- for (reg = 0;
- reg < HARD_REGNO_NREGS (REGNO (r), GET_MODE (r));
- reg++)
+ for (reg = 0; reg < REG_NREGS (r); reg++)
if (!call_used_regs[reg + REGNO (r)])
return true;
}
|| short_block
|| !(targetm.class_likely_spilled_p
(REGNO_REG_CLASS (ret_start)))
- || (nregs
- != hard_regno_nregs[ret_start][GET_MODE (ret_reg)])
+ || nregs != REG_NREGS (ret_reg)
/* For multi-hard-register floating point
values, sometimes the likely-spilled part
is ordinarily copied first, then the other
return false;
/* Ensure the number of hard registers of the copy match. */
- if (HARD_REGNO_NREGS (REGNO (src_reg), dst_mode)
- != HARD_REGNO_NREGS (REGNO (src_reg), GET_MODE (src_reg)))
+ if (HARD_REGNO_NREGS (REGNO (src_reg), dst_mode) != REG_NREGS (src_reg))
return false;
/* There's only one reaching def. */
We allow this when the registers are different because the
code in combine_reaching_defs will handle that case correctly. */
- if ((HARD_REGNO_NREGS (REGNO (dest), mode)
- != HARD_REGNO_NREGS (REGNO (reg), GET_MODE (reg)))
+ if (HARD_REGNO_NREGS (REGNO (dest), mode) != REG_NREGS (reg)
&& reg_overlap_mentioned_p (dest, reg))
return;
(set (reg:SI r10) (...))
(set (...) (reg:DI r9))
Replacing r9 with r11 is invalid. */
- if (mode != vd->e[regno].mode)
- {
- if (hard_regno_nregs[regno][mode]
- > hard_regno_nregs[regno][vd->e[regno].mode])
- return NULL_RTX;
- }
+ if (mode != vd->e[regno].mode
+ && REG_NREGS (reg) > hard_regno_nregs[regno][vd->e[regno].mode])
+ return NULL_RTX;
for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
{
set it in, make sure that the replacement is valid. */
if (mode != vd->e[regno].mode)
{
- if (hard_regno_nregs[regno][mode]
+ if (REG_NREGS (src)
> hard_regno_nregs[regno][vd->e[regno].mode])
goto no_move_special_case;
/* And likewise, if we are narrowing on big endian the transformation
is also invalid. */
- if (hard_regno_nregs[regno][mode]
- < hard_regno_nregs[regno][vd->e[regno].mode]
+ if (REG_NREGS (src) < hard_regno_nregs[regno][vd->e[regno].mode]
&& (GET_MODE_SIZE (vd->e[regno].mode) > UNITS_PER_WORD
? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN))
goto no_move_special_case;
&& GET_MODE_SIZE (mode) <= UNITS_PER_WORD
&& GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
&& ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
- != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
+ != REG_NREGS (inner)));
}
/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
> UNITS_PER_WORD)
&& ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
/ UNITS_PER_WORD)
- != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
- [GET_MODE (SUBREG_REG (in))]))
+ != REG_NREGS (SUBREG_REG (in))))
|| !targetm.hard_regno_mode_ok (subreg_regno (in), inmode)))
|| (secondary_reload_class (1, rclass, inmode, in) != NO_REGS
&& (secondary_reload_class (1, rclass, GET_MODE (SUBREG_REG (in)),
&& (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
|| (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
ORIGINAL_REGNO (XEXP (note, 0)))
- && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1))
+ && REG_NREGS (XEXP (note, 0)) == 1))
&& ! refers_to_regno_for_reload_p (regno,
end_hard_regno (rel_mode,
regno),
&& TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
regno)
&& (hard_regno_nregs[regno][rld[output_reload].outmode]
- <= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
+ <= REG_NREGS (XEXP (note, 0)))
/* Ensure that a secondary or tertiary reload for this output
won't want this register. */
&& ((secondary_out = rld[output_reload].secondary_out_reload) == -1
&& (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
|| (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun)),
ORIGINAL_REGNO (XEXP (note, 0)))
- && hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))] == 1)))
+ && REG_NREGS (XEXP (note, 0)) == 1)))
{
rld[output_reload].reg_rtx
= gen_rtx_REG (rld[output_reload].outmode, regno);
because only another subword of the hardreg is actually
used in the insn. This cannot happen if the pseudo has
been assigned exactly one hardreg. See PR 33732. */
- && hard_regno_nregs[REGNO (in)][GET_MODE (in)] == 1)))
+ && REG_NREGS (in) == 1)))
{
unsigned int regno = REGNO (in) + in_offset;
unsigned int nwords = hard_regno_nregs[regno][inmode];
regno = REGNO (reloadreg);
if (REG_WORDS_BIG_ENDIAN)
- regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
- - (int) hard_regno_nregs[regno][mode];
+ regno += (int) REG_NREGS (reloadreg) - (int) hard_regno_nregs[regno][mode];
return gen_rtx_REG (mode, regno);
}
/* Show whether this reload already has a hard reg. */
if (chain->rld[i].reg_rtx)
{
- int regno = REGNO (chain->rld[i].reg_rtx);
- chain->rld[i].regno = regno;
- chain->rld[i].nregs
- = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)];
+ chain->rld[i].regno = REGNO (chain->rld[i].reg_rtx);
+ chain->rld[i].nregs = REG_NREGS (chain->rld[i].reg_rtx);
}
else
chain->rld[i].regno = -1;
{
unsigned int i;
- nr = hard_regno_nregs[regno][GET_MODE (x)];
+ nr = REG_NREGS (x);
/* Storing into a spilled-reg invalidates its contents.
This can happen if a block-local pseudo is allocated to that reg
and it wasn't spilled because this block's total need is 0.
{
rtx reg = rld[i].reg_rtx;
if (reg && REG_P (reg)
- && ((unsigned) regno - true_regnum (reg)
- <= hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] - (unsigned) 1)
+ && (unsigned) regno - true_regnum (reg) < REG_NREGS (reg)
&& i != reloadnum)
{
rtx other_input = rld[i].in;
{
if (!targetm.hard_regno_mode_ok (regno, new_mode))
continue;
- if (hard_regno_nregs[regno][new_mode]
- > hard_regno_nregs[regno][GET_MODE (reg)])
+ if (hard_regno_nregs[regno][new_mode] > REG_NREGS (reg))
continue;
reg = reload_adjust_reg_for_mode (reg, new_mode);
}
{
machine_mode mode = GET_MODE (reg);
int regno = REGNO (reg);
- int nregs = hard_regno_nregs[regno][mode];
+ int nregs = REG_NREGS (reg);
rtx out = (REG_P (rld[r].out)
? rld[r].out
: rld[r].out_reg
mode = GET_MODE (reg);
regno = REGNO (reg);
- nregs = hard_regno_nregs[regno][mode];
+ nregs = REG_NREGS (reg);
if (REG_P (rld[r].in)
&& REGNO (rld[r].in) >= FIRST_PSEUDO_REGISTER)
in = rld[r].in;
return;
regno = REGNO (reg);
- if (regno >= FIRST_PSEUDO_REGISTER)
- nregs = 1;
- else
- nregs = hard_regno_nregs[regno][GET_MODE (reg)];
+ nregs = REG_NREGS (reg);
/* If the pseudo-reg we are reloading is no longer referenced
anywhere between the store into it and here,
gcc_assert (mode == GET_MODE (orig_dest));
regno = REGNO (orig_dest);
- for (i = 0, n = hard_regno_nregs[regno][mode]; i < n; i++)
+ for (i = 0, n = REG_NREGS (orig_dest); i < n; i++)
if (TEST_HARD_REG_BIT (hard_regs_used, regno + i))
break;
if (HARD_REGISTER_NUM_P (orig_regno))
{
int j, n;
- for (j = 0, n = hard_regno_nregs[orig_regno][mode]; j < n; j++)
+ for (j = 0, n = REG_NREGS (dest); j < n; j++)
if (REGNO_REG_SET_P (used_regs, orig_regno + j))
break;
if (j < n)
projects / gcc.git / commitdiff