import BUtils::*;
(*always_ready, always_enabled*)
interface QSPI_out;
- /*(* always_ready, result="clk_o" *) */ method bit clk_o;
- /*(* always_ready, result="io_o" *) */ method Bit#(4) io_o;
- /*(* always_ready, result="io0_sdio_ctrl" *) */ method Bit#(9) io0_sdio_ctrl;
- /*(* always_ready, result="io1_sdio_ctrl" *) */ method Bit#(9) io1_sdio_ctrl;
- /*(* always_ready, result="io2_sdio_ctrl" *) */ method Bit#(9) io2_sdio_ctrl;
- /*(* always_ready, result="io3_sdio_ctrl" *) */ method Bit#(9) io3_sdio_ctrl;
- /*(* always_ready, result="io_enable" *)*/ method Bit#(4) io_enable;
- /*(* always_ready, always_enabled *) */ method Action io_i ((* port="io_i" *) Bit#(4) io_in); // in
- /*(* always_ready, result="ncs_o" *) */ method bit ncs_o;
+ /*(* always_ready, result="clk_o" *) */
+ interface Get#(Bit#(1)) clk_o;
+ /*(* always_ready, result="io_o" *) */
+ interface Get#(Bit#(4)) io_o;
+ /*(* always_ready, result="io0_sdio_ctrl" *) */
+ method Bit#(9) io0_sdio_ctrl;
+ /*(* always_ready, result="io1_sdio_ctrl" *) */
+ method Bit#(9) io1_sdio_ctrl;
+ /*(* always_ready, result="io2_sdio_ctrl" *) */
+ method Bit#(9) io2_sdio_ctrl;
+ /*(* always_ready, result="io3_sdio_ctrl" *) */
+ method Bit#(9) io3_sdio_ctrl;
+ /*(* always_ready, result="io_enable" *)*/
+ interface Get#(Bit#(4)) io_enable;
+ /*(* always_ready, always_enabled *) */
+ //method Action io_i ((* port="io_i" *) Bit#(4) io_in); // in
+ interface Put#(Bit#(4)) io_i;
+ /*(* always_ready, result="ncs_o" *) */
+ interface Get#(Bit#(1)) ncs_o;
endinterface
interface Ifc_qspi;
`endif
interface QSPI_out out;
- method bit clk_o;
- return delay_ncs==1?dcr_ckmode:rg_clk;
- endmethod
method Bit#(9) io0_sdio_ctrl;
return sdio0r[8:0];
endmethod
method Bit#(9) io3_sdio_ctrl;
return sdio3r[8:0];
endmethod
- method Bit#(4) io_o;
- return rg_output;
- endmethod
- method Bit#(4) io_enable;
- return rg_output_en;
- endmethod
- method Action io_i (Bit#(4) io_in); // in
- rg_input<=io_in;
- endmethod
- method bit ncs_o = ncs;
+ interface clk_o = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return delay_ncs==1?dcr_ckmode:rg_clk;
+ endmethod
+ endinterface;
+ interface io_o = interface Get
+ method ActionValue#(Bit#(4)) get;
+ return rg_output;
+ endmethod
+ endinterface;
+ interface io_enable = interface Get
+ method ActionValue#(Bit#(4)) get;
+ return rg_output_en;
+ endmethod
+ endinterface;
+ interface io_in = interface Put
+ method Action put(Bit#(4) in);
+ rg_input<=in;
+ endmethod
+ endinterface;
+ interface ncs_o = interface Get
+ method ActionValue#(Bit#(1)) get;
+ return ncs
+ endmethod
+ endinterface;
endinterface
interface slave= s_xactor.axi_side;