Fix vertex cache bug that allows multiple vertices to fall into the same slot.

Need to set the slot's bit in draw->vcache.referenced even when there was a
cache hit since flushing the primitive buffer will have cleared the bitfield
but not the cache's vertex indexes.

Fixes a bug found when drawing long triangle fans but could be hit by other
prim types as well.

An alternate fix would be to call draw_vertex_cache_invalidate() from
draw_vertex_cache_unreference().

diff --git a/src/mesa/pipe/draw/draw_vertex_cache.c b/src/mesa/pipe/draw/draw_vertex_cache.c
index dc939d6d14ff630f5138d64b4a527a1e0e0dd528..56a4c34df5035a227f317eed9c40903932276403 100644 (file)
--- a/src/mesa/pipe/draw/draw_vertex_cache.c
+++ b/src/mesa/pipe/draw/draw_vertex_cache.c
@@ -59,6 +59,8 @@ static struct vertex_header *get_vertex( struct draw_context *draw,
 {
    unsigned slot = (i + (i>>5)) % VCACHE_SIZE;
    
+   assert(slot < 32); /* so we don't exceed the bitfield size below */
+
    /* Cache miss?
     */
    if (draw->vcache.idx[slot] != i) {
@@ -80,6 +82,7 @@ static struct vertex_header *get_vertex( struct draw_context *draw,
 
       /* Add to vertex shader queue:
        */
+      assert(draw->vs.queue_nr < VS_QUEUE_LENGTH);
       draw->vs.queue[draw->vs.queue_nr].dest = draw->vcache.vertex[slot];
       draw->vs.queue[draw->vs.queue_nr].elt = i;
       draw->vs.queue_nr++;
@@ -94,8 +97,14 @@ static struct vertex_header *get_vertex( struct draw_context *draw,
    }
    else {
 //      fprintf(stderr, "*");
+      /* primitive flushing may have cleared the bitfield but did not
+       * clear the idx[] array values.  Set the bit now.  This fixes a
+       * bug found when drawing long triangle fans.
+       */
+      draw->vcache.referenced |= (1 << slot);
    }
 
+
    return draw->vcache.vertex[slot];
 }