+2016-09-14 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * config/tc-sparc.c (md_assemble): Detect and warning on
+ unpredictable DCTI couples in certain arches.
+ (dcti_couples_detect): New global.
+ (md_longopts): Add command line option -dcti-couples-detect.
+ (md_show_usage): Document -dcti-couples-detect.
+ (md_parse_option): Handle OPTION_DCTI_COUPLES_DETECT.
+ * testsuite/gas/sparc/sparc.exp (gas_64_check): Run
+ dcti-couples-v8, dcti-couples-v9 and dcti-couples-v9c tests.
+ * testsuite/gas/sparc/dcti-couples.s: New file.
+ * testsuite/gas/sparc/dcti-couples-v9c.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v8.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v9.d: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v9c.l: Likewise.
+ * testsuite/gas/sparc/dcti-couples-v8.l: Likewise.
+ * doc/as.texinfo (Overview): Document --dcti-couples-detect.
+ * doc/c-sparc.texi (Sparc-Opts): Likewise.
+
2016-09-14 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/tls-relocs2.d: New file.
architecture, issue a warning. */
static enum sparc_opcode_arch_val warn_after_architecture;
-/* Non-zero if as should generate error if an undeclared g[23] register
- has been used in -64. */
+/* Non-zero if the assembler should generate error if an undeclared
+ g[23] register has been used in -64. */
static int no_undeclared_regs;
+/* Non-zero if the assembler should generate a warning if an
+ unpredictable DCTI (delayed control transfer instruction) couple is
+ found. */
+static int dcti_couples_detect;
+
/* Non-zero if we should try to relax jumps and calls. */
static int sparc_relax;
{"relax", no_argument, NULL, OPTION_RELAX},
#define OPTION_NO_RELAX (OPTION_MD_BASE + 15)
{"no-relax", no_argument, NULL, OPTION_NO_RELAX},
+#define OPTION_DCTI_COUPLES_DETECT (OPTION_MD_BASE + 16)
+ {"dcti-couples-detect", no_argument, NULL, OPTION_DCTI_COUPLES_DETECT},
{NULL, no_argument, NULL, 0}
};
sparc_relax = 0;
break;
+ case OPTION_DCTI_COUPLES_DETECT:
+ dcti_couples_detect = 1;
+ break;
+
default:
return 0;
}
appropriate .register directive (default)\n\
-no-undeclared-regs force error on application global register usage\n\
without appropriate .register directive\n\
+--dcti-couples-detect warn when an unpredictable DCTI couple is found\n\
-q ignored\n\
-Qy, -Qn ignored\n\
-s ignored\n"));
if (insn == NULL)
return;
- /* We warn about attempts to put a floating point branch in a delay slot,
- unless the delay slot has been annulled. */
+ /* Certain instructions may not appear on delay slots. Check for
+ these situations. */
if (last_insn != NULL
- && (insn->flags & F_FBR) != 0
- && (last_insn->flags & F_DELAYED) != 0
- /* ??? This test isn't completely accurate. We assume anything with
- F_{UNBR,CONDBR,FBR} set is annullable. */
- && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0
- || (last_opcode & ANNUL) == 0))
- as_warn (_("FP branch in delay slot"));
+ && (last_insn->flags & F_DELAYED) != 0)
+ {
+ /* Before SPARC V9 the effect of having a delayed branch
+ instruction in the delay slot of a conditional delayed branch
+ was undefined.
+
+ In SPARC V9 DCTI couples are well defined.
+
+ However, starting with the UltraSPARC Architecture 2005, DCTI
+ couples (of all kind) are deprecated and should not be used,
+ as they may be slow or behave differently to what the
+ programmer expects. */
+ if (dcti_couples_detect
+ && (insn->flags & F_DELAYED) != 0
+ && ((max_architecture < SPARC_OPCODE_ARCH_V9
+ && (last_insn->flags & F_CONDBR) != 0)
+ || max_architecture >= SPARC_OPCODE_ARCH_V9C))
+ as_warn (_("unpredictable DCTI couple"));
+
+
+ /* We warn about attempts to put a floating point branch in a
+ delay slot, unless the delay slot has been annulled. */
+ if ((insn->flags & F_FBR) != 0
+ /* ??? This test isn't completely accurate. We assume anything with
+ F_{UNBR,CONDBR,FBR} set is annullable. */
+ && ((last_insn->flags & (F_UNBR | F_CONDBR | F_FBR)) == 0
+ || (last_opcode & ANNUL) == 0))
+ as_warn (_("FP branch in delay slot"));
+ }
/* SPARC before v9 requires a nop instruction between a floating
point instruction and a floating point branch. We insert one
@emph{Target SPARC options:}
@c The order here is important. See c-sparc.texi.
- [@b{-Av6}|@b{-Av7}|@b{-Av8}|@b{-Asparclet}|@b{-Asparclite}
- @b{-Av8plus}|@b{-Av8plusa}|@b{-Av9}|@b{-Av9a}]
- [@b{-xarch=v8plus}|@b{-xarch=v8plusa}] [@b{-bump}]
+ [@b{-Av6}|@b{-Av7}|@b{-Av8}|@b{-Aleon}|@b{-Asparclet}|@b{-Asparclite}
+ @b{-Av8plus}|@b{-Av8plusa}|@b{-Av8plusb}|@b{-Av8plusc}|@b{-Av8plusd}
+ @b{-Av8plusv}|@b{-Av8plusm}|@b{-Av9}|@b{-Av9a}|@b{-Av9b}|@b{-Av9c}
+ @b{-Av9d}|@b{-Av9e}|@b{-Av9v}|@b{-Av9m}|@b{-Asparc}|@b{-Asparcvis}
+ @b{-Asparcvis2}|@b{-Asparcfmaf}|@b{-Asparcima}|@b{-Asparcvis3}
+ @b{-Asparcvisr}|@b{-Asparc5}]
+ [@b{-xarch=v8plus}|@b{-xarch=v8plusa}]|@b{-xarch=v8plusb}|@b{-xarch=v8plusc}
+ @b{-xarch=v8plusd}|@b{-xarch=v8plusv}|@b{-xarch=v8plusm}|@b{-xarch=v9}
+ @b{-xarch=v9a}|@b{-xarch=v9b}|@b{-xarch=v9c}|@b{-xarch=v9d}|@b{-xarch=v9e}
+ @b{-xarch=v9v}|@b{-xarch=v9m}|@b{-xarch=sparc}|@b{-xarch=sparcvis}
+ @b{-xarch=sparcvis2}|@b{-xarch=sparcfmaf}|@b{-xarch=sparcima}
+ @b{-xarch=sparcvis3}|@b{-xarch=sparcvisr}|@b{-xarch=sparc5}
+ @b{-bump}]
[@b{-32}|@b{-64}]
+ [@b{--enforce-aligned-data}][@b{--dcti-couples-detect}]
@end ifset
@ifset TIC54X
@kindex -Asparcvis3
@kindex -Asparcvis3r
@item -Av6 | -Av7 | -Av8 | -Aleon | -Asparclet | -Asparclite
-@itemx -Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv
+@itemx -Av8plus | -Av8plusa | -Av8plusb | -Av8plusc | -Av8plusd | -Av8plusv | -Av8plusm
@itemx -Av9 | -Av9a | -Av9b | -Av9c | -Av9d | -Av9e | -Av9v | -Av9m
@itemx -Asparc | -Asparcvis | -Asparcvis2 | -Asparcfmaf | -Asparcima
-@itemx -Asparcvis3 | -Asparcvis3r
+@itemx -Asparcvis3 | -Asparcvis3r | -Asparc5
Use one of the @samp{-A} options to select one of the SPARC
architectures explicitly. If you select an architecture explicitly,
@code{@value{AS}} reports a fatal error if it encounters an instruction
@samp{-Asparc5} is equivalent to @samp{-Av9m}.
@item -xarch=v8plus | -xarch=v8plusa | -xarch=v8plusb | -xarch=v8plusc
-@itemx -xarch=v8plusd | -xarch=v8plusv | -xarch=v9 | -xarch=v9a
+@itemx -xarch=v8plusd | -xarch=v8plusv | -xarch=v8plusm | -xarch=v9 | -xarch=v9a
@itemx -xarch=v9b | -xarch=v9c | -xarch=v9d | -xarch=v9e | -xarch=v9v | -xarch=v9m
@itemx -xarch=sparc | -xarch=sparcvis | -xarch=sparcvis2
@itemx -xarch=sparcfmaf | -xarch=sparcima | -xarch=sparcvis3
@itemx -xarch=sparcvis3r | -xarch=sparc5
For compatibility with the SunOS v9 assembler. These options are
equivalent to -Av8plus, -Av8plusa, -Av8plusb, -Av8plusc, -Av8plusd,
--Av8plusv, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9e, -Av9v, -Av9m,
+-Av8plusv, -Av8plusm, -Av9, -Av9a, -Av9b, -Av9c, -Av9d, -Av9e, -Av9v, -Av9m,
-Asparc, -Asparcvis, -Asparcvis2, -Asparcfmaf, -Asparcima,
-Asparcvis3, and -Asparcvis3r, respectively.
Select the word size, either 32 bits or 64 bits.
These options are only available with the ELF object file format,
and require that the necessary BFD support has been included.
+
+@item --dcti-couples-detect
+Warn if a DCTI (delayed control transfer instruction) couple is found
+when generating code for a variant of the SPARC architecture in which
+the execution of the couple is unpredictable, or very slow. This is
+disabled by default.
@end table
@node Sparc-Aligned-Data
--- /dev/null
+#as: -Av8 --dcti-couples-detect
+#name: dcti couples (v8)
+#source: dcti-couples.s
+#error-output: dcti-couples-v8.l
--- /dev/null
+.*dcti-couples.s: Assembler messages:
+.*dcti-couples.s:5:.*unpredictable DCTI couple
--- /dev/null
+#as: -Av9 --dcti-couples-detect
+#objdump: -dr
+#name: dcti couples (v9)
+#source: dcti-couples.s
+
+.*: +file format .*sparc.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ 0: 1a 80 00 03 bcc 0xc
+ 4: 10 80 00 02 b 0xc
+ 8: 01 00 00 00 nop
+ c: 10 80 00 00 b 0xc
+ 10: 10 bf ff ff b 0xc
+ 14: 01 00 00 00 nop
--- /dev/null
+#as: -Av9c --dcti-couples-detect
+#name: dcti couples (v9c+)
+#source: dcti-couples.s
+#error-output: dcti-couples-v9c.l
--- /dev/null
+.*dcti-couples.s: Assembler messages:
+.*dcti-couples.s:5:.*unpredictable DCTI couple
+.*dcti-couples.s:12:.*unpredictable DCTI couple
--- /dev/null
+ # The execution order of the following DCTI couple is
+ # unpredictable in arches prior to V9, and also in arches
+ # starting with V9C.
+ bcc 1f
+ b 1f
+ nop
+1:
+ # The following DCTI couple is deprecated starting with V9C
+ # (UltraSPARC Architecture 2005) but it is ok in previous
+ # arches.
+ b 1b
+ b 1b
+ nop
run_dump_test "v9branch5"
run_dump_test "pr19910-1"
run_list_test "pr19910-2"
+ run_dump_test "dcti-couples-v8"
+ run_dump_test "dcti-couples-v9"
+ run_dump_test "dcti-couples-v9c"
}
if [istarget sparc-*-vxworks*] {
projects / binutils-gdb.git / commitdiff