*/
boolean (*cs_validate)(struct radeon_winsys_cs *cs);
+ /**
+ * Check whether the given number of dwords is available in the IB.
+ * Optionally chain a new chunk of the IB if necessary and supported.
+ *
+ * \param cs A command stream.
+ * \param dw Number of CS dwords requested by the caller.
+ */
+ bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw);
+
/**
* Return TRUE if there is enough memory in VRAM and GTT for the buffers
* added so far.
return TRUE;
}
+static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
+{
+ assert(rcs->cdw <= rcs->max_dw);
+ return rcs->max_dw - rcs->cdw >= dw;
+}
+
static boolean amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
{
struct amdgpu_cs *cs = amdgpu_cs(rcs);
ws->base.cs_add_buffer = amdgpu_cs_add_buffer;
ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer;
ws->base.cs_validate = amdgpu_cs_validate;
+ ws->base.cs_check_space = amdgpu_cs_check_space;
ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
ws->base.cs_query_memory_usage = amdgpu_cs_query_memory_usage;
ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
return status;
}
+static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
+{
+ assert(rcs->cdw <= rcs->max_dw);
+ return rcs->max_dw - rcs->cdw >= dw;
+}
+
static boolean radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
{
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
ws->base.cs_add_buffer = radeon_drm_cs_add_buffer;
ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer;
ws->base.cs_validate = radeon_drm_cs_validate;
+ ws->base.cs_check_space = radeon_drm_cs_check_space;
ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
ws->base.cs_query_memory_usage = radeon_drm_cs_query_memory_usage;
ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;