+2012-11-14 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * config/tc-ppc.c (md_apply_fix): Leave field zero when emitting
+ an ELF reloc on data as well.
+
2012-11-09 Maciej W. Rozycki <macro@codesourcery.com>
* read.h (s_vendor_attribute): Move to...
}
else
{
+ int size = 0;
+ offsetT fieldval = value;
+
/* Handle relocs in data. */
switch (fixP->fx_r_type)
{
case BFD_RELOC_32_PCREL:
case BFD_RELOC_RVA:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 4);
+ size = 4;
break;
case BFD_RELOC_64:
/* fall through */
case BFD_RELOC_64_PCREL:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 8);
+ size = 8;
break;
case BFD_RELOC_16:
/* fall through */
case BFD_RELOC_16_PCREL:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 2);
+ size = 2;
break;
case BFD_RELOC_8:
fixP->fx_done = 1;
}
else
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 1);
+ size = 1;
break;
case BFD_RELOC_VTABLE_INHERIT:
if (fixP->fx_pcrel)
fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
case BFD_RELOC_LO16_PCREL:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- value, 2);
+ size = 2;
break;
case BFD_RELOC_HI16:
if (fixP->fx_pcrel)
fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
case BFD_RELOC_HI16_PCREL:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HI (value), 2);
+ size = 2;
+ fieldval = PPC_HI (value);
break;
case BFD_RELOC_HI16_S:
if (fixP->fx_pcrel)
fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
case BFD_RELOC_HI16_S_PCREL:
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HA (value), 2);
+ size = 2;
+ fieldval = PPC_HA (value);
break;
case BFD_RELOC_PPC64_HIGHER:
if (fixP->fx_pcrel)
goto bad_pcrel;
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HIGHER (value), 2);
+ size = 2;
+ fieldval = PPC_HIGHER (value);
break;
case BFD_RELOC_PPC64_HIGHER_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HIGHERA (value), 2);
+ size = 2;
+ fieldval = PPC_HIGHERA (value);
break;
case BFD_RELOC_PPC64_HIGHEST:
if (fixP->fx_pcrel)
goto bad_pcrel;
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HIGHEST (value), 2);
+ size = 2;
+ fieldval = PPC_HIGHEST (value);
break;
case BFD_RELOC_PPC64_HIGHEST_S:
if (fixP->fx_pcrel)
goto bad_pcrel;
- md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
- PPC_HIGHESTA (value), 2);
+ size = 2;
+ fieldval = PPC_HIGHESTA (value);
break;
case BFD_RELOC_PPC_DTPMOD:
fflush (stderr);
abort ();
}
+
+ if (size && APPLY_RELOC)
+ md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
+ fieldval, size);
}
#ifdef OBJ_ELF
+2012-11-14 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * gas/ppc/astest.d: Update for fixup changes.
+ * gas/ppc/astest64.d: Likewise.
+ * gas/ppc/astest2.d: Likewise.
+ * gas/ppc/astest2_64.d: Likewise.
+ * gas/ppc/test1elf32.d: Likewise.
+ * gas/ppc/test1elf64.d: Likewise.
+
2012-11-09 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel.
38: (48 00 00 00|00 00 00 48) b .*
38: R_PPC_LOCAL24PC a
3c: (4b ff ff d4|d4 ff ff 4b) b 10 <apfour>
- 40: (00 00 00 40|40 00 00 00) \.long 0x40
+ \.\.\.
40: R_PPC_ADDR32 \.text\+0x40
- 44: (00 00 00 4c|4c 00 00 00) \.long 0x4c
44: R_PPC_ADDR32 \.text\+0x4c
- 48: (00 00 00 00|00 00 00 00) \.long 0x0
48: R_PPC_REL32 x
- 4c: (00 00 00 04|04 00 00 00) \.long 0x4
4c: R_PPC_REL32 x\+0x4
- 50: (00 00 00 00|00 00 00 00) \.long 0x0
50: R_PPC_REL32 z
- 54: (00 00 00 04|04 00 00 00) \.long 0x4
54: R_PPC_REL32 \.data\+0x4
- 58: (00 00 00 00|00 00 00 00) \.long 0x0
58: R_PPC_ADDR32 x
- 5c: (00 00 00 04|04 00 00 00) \.long 0x4
5c: R_PPC_ADDR32 \.data\+0x4
- 60: (00 00 00 00|00 00 00 00) \.long 0x0
60: R_PPC_ADDR32 z
- 64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
64: R_PPC_ADDR32 x-0x4
- 68: (00 00 00 00|00 00 00 00) \.long 0x0
68: R_PPC_ADDR32 \.data
- 6c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
6c: R_PPC_ADDR32 z-0x4
70: (ff ff ff 9c|9c ff ff ff) \.long 0xffffff9c
74: (ff ff ff 9c|9c ff ff ff) \.long 0xffffff9c
- 78: (00 00 00 00|00 00 00 00) \.long 0x0
+ \.\.\.
78: R_PPC_ADDR32 a
- 7c: (00 00 00 10|10 00 00 00) \.long 0x10
7c: R_PPC_ADDR32 \.text\+0x10
- 80: (00 00 00 10|10 00 00 00) \.long 0x10
80: R_PPC_ADDR32 \.text\+0x10
84: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
- 88: (00 00 00 12|12 00 00 00) \.long 0x12
+ \.\.\.
88: R_PPC_ADDR32 \.text\+0x12
- 8c: 00 00 00 00 \.long 0x0
Disassembly of section \.data:
0+0000000 <x>:
38: (48 00 00 00|00 00 00 48) b .*
38: R_PPC_LOCAL24PC a
3c: (48 00 00 40|40 00 00 48) b 7c <apfour>
- 40: (00 00 00 40|40 00 00 00) \.long 0x40
+ \.\.\.
40: R_PPC_ADDR32 \.text\+0x40
- 44: (00 00 00 4c|4c 00 00 00) \.long 0x4c
44: R_PPC_ADDR32 \.text\+0x4c
- 48: (00 00 00 00|00 00 00 00) \.long 0x0
48: R_PPC_REL32 x
- 4c: (00 00 00 04|04 00 00 00) \.long 0x4
4c: R_PPC_REL32 x\+0x4
- 50: (00 00 00 00|00 00 00 00) \.long 0x0
50: R_PPC_REL32 z
- 54: (00 00 00 04|04 00 00 00) \.long 0x4
54: R_PPC_REL32 \.data\+0x4
- 58: (00 00 00 00|00 00 00 00) \.long 0x0
58: R_PPC_ADDR32 x
- 5c: (00 00 00 04|04 00 00 00) \.long 0x4
5c: R_PPC_ADDR32 \.data\+0x4
- 60: (00 00 00 00|00 00 00 00) \.long 0x0
60: R_PPC_ADDR32 z
- 64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
64: R_PPC_ADDR32 x-0x4
- 68: (00 00 00 00|00 00 00 00) \.long 0x0
68: R_PPC_ADDR32 \.data
- 6c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
6c: R_PPC_ADDR32 z-0x4
70: (00 00 00 08|08 00 00 00) \.long 0x8
74: (00 00 00 08|08 00 00 00) \.long 0x8
78: R_PPC_ADDR32 a
0+000007c <apfour>:
- 7c: (00 00 00 7c|7c 00 00 00) \.long 0x7c
+ \.\.\.
7c: R_PPC_ADDR32 \.text\+0x7c
- 80: (00 00 00 7c|7c 00 00 00) \.long 0x7c
80: R_PPC_ADDR32 \.text\+0x7c
84: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
- 88: (00 00 00 7e|7e 00 00 00) \.long 0x7e
+ \.\.\.
88: R_PPC_ADDR32 \.text\+0x7e
- 8c: (00 00 00 00|00 00 00 00) \.long 0x0
90: (60 00 00 00|00 00 00 60) nop
94: (40 a5 ff fc|fc ff a5 40) ble- cr1,90 <apfour\+0x14>
98: (41 a9 ff f8|f8 ff a9 41) bgt- cr2,90 <apfour\+0x14>
30: (48 00 00 0.|0. 00 00 48) b .*
30: R_PPC64_REL24 a\+0x4
34: (48 00 00 44|44 00 00 48) b 78 <apfour\+0x4>
- 38: (00 00 00 38|38 00 00 00) \.long 0x38
+ \.\.\.
38: R_PPC64_ADDR32 \.text\+0x38
- 3c: (00 00 00 44|44 00 00 00) \.long 0x44
3c: R_PPC64_ADDR32 \.text\+0x44
- 40: (00 00 00 00|00 00 00 00) \.long 0x0
40: R_PPC64_REL32 x
- 44: (00 00 00 04|04 00 00 00) \.long 0x4
44: R_PPC64_REL32 x\+0x4
- 48: (00 00 00 00|00 00 00 00) \.long 0x0
48: R_PPC64_REL32 z
- 4c: (00 00 00 04|04 00 00 00) \.long 0x4
4c: R_PPC64_REL32 \.data\+0x4
- 50: (00 00 00 00|00 00 00 00) \.long 0x0
50: R_PPC64_ADDR32 x
- 54: (00 00 00 04|04 00 00 00) \.long 0x4
54: R_PPC64_ADDR32 \.data\+0x4
- 58: (00 00 00 00|00 00 00 00) \.long 0x0
58: R_PPC64_ADDR32 z
- 5c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
5c: R_PPC64_ADDR32 x-0x4
- 60: (00 00 00 00|00 00 00 00) \.long 0x0
60: R_PPC64_ADDR32 \.data
- 64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
64: R_PPC64_ADDR32 z-0x4
68: (00 00 00 08|08 00 00 00) \.long 0x8
6c: (00 00 00 08|08 00 00 00) \.long 0x8
70: R_PPC64_ADDR32 a
0000000000000074 <apfour>:
- 74: (00 00 00 74|74 00 00 00) \.long 0x74
+ \.\.\.
74: R_PPC64_ADDR32 \.text\+0x74
- 78: (00 00 00 74|74 00 00 00) \.long 0x74
78: R_PPC64_ADDR32 \.text\+0x74
7c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
- 80: (00 00 00 76|76 00 00 00) \.long 0x76
+ \.\.\.
80: R_PPC64_ADDR32 \.text\+0x76
- 84: (00 00 00 00|00 00 00 00) \.long 0x0
Disassembly of section \.data:
0000000000000000 <x>:
30: (48 00 00 0.|0. 00 00 48) b .*
30: R_PPC64_REL24 a\+0x4
34: (4b ff ff e0|e0 ff ff 4b) b 14 <apfour\+0x4>
- 38: (00 00 00 38|38 00 00 00) \.long 0x38
+ \.\.\.
38: R_PPC64_ADDR32 \.text\+0x38
- 3c: (00 00 00 44|44 00 00 00) \.long 0x44
3c: R_PPC64_ADDR32 \.text\+0x44
- 40: (00 00 00 00|00 00 00 00) \.long 0x0
40: R_PPC64_REL32 x
- 44: (00 00 00 04|04 00 00 00) \.long 0x4
44: R_PPC64_REL32 x\+0x4
- 48: (00 00 00 00|00 00 00 00) \.long 0x0
48: R_PPC64_REL32 z
- 4c: (00 00 00 04|04 00 00 00) \.long 0x4
4c: R_PPC64_REL32 \.data\+0x4
- 50: (00 00 00 00|00 00 00 00) \.long 0x0
50: R_PPC64_ADDR32 x
- 54: (00 00 00 04|04 00 00 00) \.long 0x4
54: R_PPC64_ADDR32 \.data\+0x4
- 58: (00 00 00 00|00 00 00 00) \.long 0x0
58: R_PPC64_ADDR32 z
- 5c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
5c: R_PPC64_ADDR32 x-0x4
- 60: (00 00 00 00|00 00 00 00) \.long 0x0
60: R_PPC64_ADDR32 \.data
- 64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
64: R_PPC64_ADDR32 z-0x4
68: (ff ff ff a4|a4 ff ff ff) \.long 0xffffffa4
6c: (ff ff ff a4|a4 ff ff ff) \.long 0xffffffa4
- 70: (00 00 00 00|00 00 00 00) \.long 0x0
+ \.\.\.
70: R_PPC64_ADDR32 a
- 74: (00 00 00 10|10 00 00 00) \.long 0x10
74: R_PPC64_ADDR32 \.text\+0x10
- 78: (00 00 00 10|10 00 00 00) \.long 0x10
78: R_PPC64_ADDR32 \.text\+0x10
7c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
- 80: (00 00 00 12|12 00 00 00) \.long 0x12
+ \.\.\.
80: R_PPC64_ADDR32 \.text\+0x12
- 84: (00 00 00 00|00 00 00 00) \.long 0x0
Disassembly of section \.data:
0000000000000000 <x>:
4: (ca fe ba be|be ba fe ca) lfd f23,-17730\(r30\)
0+0008 <datpt>:
- 8: (00 98 96 80|80 96 98 00) \.long 0x989680
+ 8: 00 00 00 00 \.long 0x0
8: R_PPC_REL32 jk\+0x989680
0+000c <dat0>:
- c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
+ c: 00 00 00 00 \.long 0x0
c: R_PPC_REL32 jk-0x4
0+0010 <dat1>:
- 10: (00 00 00 00|00 00 00 00) \.long 0x0
+ 10: 00 00 00 00 \.long 0x0
10: R_PPC_REL32 jk
0+0014 <dat2>:
- 14: (00 00 00 04|04 00 00 00) \.long 0x4
+ 14: 00 00 00 00 \.long 0x0
14: R_PPC_REL32 jk\+0x4
c: (ca fe ba be|00 00 00 00) .*
0000000000000010 <datpt>:
- 10: (00 98 96 80|80 96 98 00) .*
+ 10: 00 00 00 00 .*
10: R_PPC64_REL32 jk\+0x989680
0000000000000014 <dat0>:
- 14: (ff ff ff fc|fc ff ff ff) .*
+ 14: 00 00 00 00 .*
14: R_PPC64_REL32 jk-0x4
0000000000000018 <dat1>:
18: R_PPC64_REL32 jk
000000000000001c <dat2>:
- 1c: (00 00 00 04|04 00 00 00) .*
+ 1c: 00 00 00 00 .*
1c: R_PPC64_REL32 jk\+0x4
0000000000000020 <dat3>:
- 20: (00 00 00 00|08 00 00 00) .*
+ \.\.\.
20: R_PPC64_REL64 jk\+0x8
- 24: (00 00 00 08|00 00 00 00) .*
0000000000000028 <dat4>:
- 28: (00 00 00 00|10 00 00 00) .*
+ \.\.\.
28: R_PPC64_REL64 jk\+0x10
- 2c: (00 00 00 10|00 00 00 00) .*
Disassembly of section \.toc:
0000000000000000 <\.toc>: