+2009-10-14 Andrew Stubbs <ams@codesourcery.com>
+
+ * sh-tdep.c (sh_gdbarch_init): Add show_regs settings for
+ bfd_mach_sh3_nommu, bfd_mach_sh2a_nofpu_or_sh3_nommu,
+ bfd_mach_sh2a_or_sh3e, bfd_mach_sh2a_or_sh4, bfd_mach_sh4_nommu_nofpu,
+ and bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu.
+ Move bfd_mach_sh2a_or_sh4 to use the same configuration as
+ bfd_mach_sh4.
+
2009-10-13 Daniel Jacobowitz <dan@codesourcery.com>
* arm-tdep.c (arm_push_dummy_call): Set the low bit of LR for
break;
case bfd_mach_sh3:
+ case bfd_mach_sh3_nommu:
+ case bfd_mach_sh2a_nofpu_or_sh3_nommu:
sh_show_regs = sh3_show_regs;
break;
case bfd_mach_sh3e:
+ case bfd_mach_sh2a_or_sh3e:
sh_show_regs = sh3e_show_regs;
break;
case bfd_mach_sh4:
case bfd_mach_sh4a:
+ case bfd_mach_sh2a_or_sh4:
sh_show_regs = sh4_show_regs;
break;
case bfd_mach_sh4_nofpu:
+ case bfd_mach_sh4_nommu_nofpu:
case bfd_mach_sh4a_nofpu:
+ case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
sh_show_regs = sh4_nofpu_show_regs;
break;
case bfd_mach_sh4:
case bfd_mach_sh4a:
+ case bfd_mach_sh2a_or_sh4:
set_gdbarch_register_name (gdbarch, sh_sh4_register_name);
set_gdbarch_register_type (gdbarch, sh_sh4_register_type);
set_gdbarch_fp0_regnum (gdbarch, 25);
case bfd_mach_sh4a_nofpu:
case bfd_mach_sh4_nommu_nofpu:
case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
- case bfd_mach_sh2a_or_sh4:
set_gdbarch_register_name (gdbarch, sh_sh4_nofpu_register_name);
break;