re PR target/63870 ([Aarch64] [ARM] Errors in use of NEON intrinsics are reported...

        PR target/63870
        * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Pass
        expression to aarch64_simd_lane_bounds.
        * config/aarch64/aarch64-protos.h (aarch64_simd_lane_bounds): Update
        prototype.
        * config/aarch64/aarch64-simd.md: (aarch64_combinez<mode>): Update
        call to aarch64_simd_lane_bounds.
        (aarch64_get_lanedi): Likewise.
        (aarch64_ld2_lane<mode>): Likewise.
        (aarch64_ld3_lane<mode>): Likewise.
        (aarch64_ld4_lane<mode>): Likewise.
        (aarch64_im_lane_boundsi): Likewise.
        * config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Add exp
        parameter. Report calling function in error message if exp is non-NULL.

From-SVN: r217885

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 051e275272b05a4e926580cf42753396a91b220e..3cbdb6f5376ceab07d254d6aecb519d2fd7cb326 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2014-11-20  Charles Baylis  <charles.baylis@linaro.org>
+
+       PR target/63870
+       * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Pass
+       expression to aarch64_simd_lane_bounds.
+       * config/aarch64/aarch64-protos.h (aarch64_simd_lane_bounds): Update
+       prototype.
+       * config/aarch64/aarch64-simd.md: (aarch64_combinez<mode>): Update
+       call to aarch64_simd_lane_bounds.
+       (aarch64_get_lanedi): Likewise.
+       (aarch64_ld2_lane<mode>): Likewise.
+       (aarch64_ld3_lane<mode>): Likewise.
+       (aarch64_ld4_lane<mode>): Likewise.
+       (aarch64_im_lane_boundsi): Likewise.
+       * config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Add exp
+       parameter. Report calling function in error message if exp is non-NULL.
+
 2014-11-20  Segher Boessenkool  <segher@kernel.crashing.org>
 
        PR target/60111

diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 2637c71c3f47f4c8210923925ba7d975ffd3f012..e9c4c85fd3f1dbbb81d306bbab79409034261dc3 100644 (file)
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -909,7 +909,7 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval,
                {
                  enum machine_mode vmode = mode[argc - 1];
                  aarch64_simd_lane_bounds (op[argc],
-                                           0, GET_MODE_NUNITS (vmode));
+                                           0, GET_MODE_NUNITS (vmode), exp);
                  /* Keep to GCC-vector-extension lane indices in the RTL.  */
                  op[argc] = GEN_INT (ENDIAN_LANE_N (vmode, INTVAL (op[argc])));
                }

diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h
index 8ef6401ab3cc4d0f33c3bad6e97f7a228b9560fb..52e97e745a01933beccecea0a40a51c6f5d2fe97 100644 (file)
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -268,7 +268,7 @@ void aarch64_simd_emit_pair_result_insn (machine_mode,
 /* Expand builtins for SIMD intrinsics.  */
 rtx aarch64_simd_expand_builtin (int, tree, rtx);
 
-void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
+void aarch64_simd_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
 
 void aarch64_split_128bit_move (rtx, rtx);
 

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 2e71cb957d721b31608ba4bf1f5c1e19487d5f08..23345b1df1ebb28075edd2effd5f327749abd61d 100644 (file)
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -2436,7 +2436,7 @@
    (match_operand:SI 2 "immediate_operand")]
   "TARGET_SIMD"
 {
-  aarch64_simd_lane_bounds (operands[2], 0, 1);
+  aarch64_simd_lane_bounds (operands[2], 0, 1, NULL);
   emit_move_insn (operands[0], operands[1]);
   DONE;
 })
@@ -4366,7 +4366,8 @@
   machine_mode mode = <V_TWO_ELEM>mode;
   rtx mem = gen_rtx_MEM (mode, operands[1]);
 
-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode));
+  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
+                           NULL);
   emit_insn (gen_aarch64_vec_load_lanesoi_lane<mode> (operands[0],
                                                      mem,
                                                      operands[2],
@@ -4385,7 +4386,8 @@
   machine_mode mode = <V_THREE_ELEM>mode;
   rtx mem = gen_rtx_MEM (mode, operands[1]);
 
-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode));
+  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
+                           NULL);
   emit_insn (gen_aarch64_vec_load_lanesci_lane<mode> (operands[0],
                                                      mem,
                                                      operands[2],
@@ -4404,7 +4406,8 @@
   machine_mode mode = <V_FOUR_ELEM>mode;
   rtx mem = gen_rtx_MEM (mode, operands[1]);
 
-  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode));
+  aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode),
+                           NULL);
   emit_insn (gen_aarch64_vec_load_lanesxi_lane<mode> (operands[0],
                                                      mem,
                                                      operands[2],
@@ -4554,7 +4557,7 @@
    (match_operand:SI 1 "immediate_operand" "i")]
   "TARGET_SIMD"
 {
-  aarch64_simd_lane_bounds (operands[0], 0, INTVAL (operands[1]));
+  aarch64_simd_lane_bounds (operands[0], 0, INTVAL (operands[1]), NULL);
   DONE;
 }
 )

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 2d8f48d11990e2cbc91cbda8015a51bad4089b4e..180951366481ccb78a48eb22c3c2d464d1279408 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8403,14 +8403,20 @@ aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode,
 /* Bounds-check lanes.  Ensure OPERAND lies between LOW (inclusive) and
    HIGH (exclusive).  */
 void
-aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
+aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high,
+                         const_tree exp)
 {
   HOST_WIDE_INT lane;
   gcc_assert (CONST_INT_P (operand));
   lane = INTVAL (operand);
 
   if (lane < low || lane >= high)
-    error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
+  {
+    if (exp)
+      error ("%Klane %ld out of range %ld - %ld", exp, lane, low, high - 1);
+    else
+      error ("lane %ld out of range %ld - %ld", lane, low, high - 1);
+  }
 }
 
 /* Emit code to place a AdvSIMD pair result in memory locations (with equal