debug: Use consistent 'sim_cmd' argument.

diff --git a/debug/targets.py b/debug/targets.py
index a69f43d91463924ccee841d7f9aaaac640710a7b..17e752df8e72fe71749842ab8afc2bc2102c151e 100644 (file)
--- a/debug/targets.py
+++ b/debug/targets.py
@@ -127,7 +127,7 @@ class FreedomU500SimTarget(Target):
     openocd_config = "targets/%s/openocd.cfg" % name
 
     def target(self):
-        return testlib.VcsSim(simv=self.sim_cmd, debug=False)
+        return testlib.VcsSim(sim_cmd=self.sim_cmd, debug=False)
 
 targets = [
         Spike32Target,

diff --git a/debug/testlib.py b/debug/testlib.py
index a66d59a7b450baf63e7b99aa6c50ef6e0ded3fec..df976df66ac1684ce85ae3e2d162e28c6cf567da 100644 (file)
--- a/debug/testlib.py
+++ b/debug/testlib.py
@@ -113,7 +113,7 @@ class Spike(object):
 class VcsSim(object):
     def __init__(self, sim_cmd=None, debug=False):
         if sim_cmd:
-            cmd = shlex.split(simv)
+            cmd = shlex.split(sim_cmd)
         else:
             cmd = ["simv"]
         cmd += ["+jtag_vpi_enable"]