h8300.c (output_logical_op): Optimize or.l when ORing with 0xffff??00 with the highes...

	* config/h8300/h8300.c (output_logical_op): Optimize or.l when
	ORing with 0xffff??00 with the highest bit of the ?? part set.
	(compute_logical_op_length): Update.
	(compute_logical_op_cc): Likewise.

From-SVN: r63131

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d083a31cf0ce21810bd53dec00e482fd1ed78cf2..fb7d4423d16052c4e824bdb9446b59ba96037986 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2003-02-19  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/h8300/h8300.c (output_logical_op): Optimize or.l when
+       ORing with 0xffff??00 with the highest bit of the ?? part set.
+       (compute_logical_op_length): Update.
+       (compute_logical_op_cc): Likewise.
+
 2003-02-19  Josef Zlomek  <zlomekj@suse.cz>
 
        * bb-reorder.c (find_traces_1_round): Fixed condition for small

diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 173946cbc725dd5fad3149d169e8224b652a7bcc..08a7cc606a657cc1c939facf9d7c6229dab3c166 100644 (file)
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -2206,7 +2206,9 @@ output_logical_op (mode, operands)
         using multiple insns.  */
       if ((TARGET_H8300H || TARGET_H8300S)
          && w0 != 0 && w1 != 0
-         && !(lower_half_easy_p && upper_half_easy_p))
+         && !(lower_half_easy_p && upper_half_easy_p)
+         && !(code == IOR && w1 == 0xffff
+              && (w0 & 0x8000) != 0 && lower_half_easy_p))
        {
          sprintf (insn_buf, "%s.l\t%%S2,%%S0", opname);
          output_asm_insn (insn_buf, operands);
@@ -2250,6 +2252,13 @@ output_logical_op (mode, operands)
            output_asm_insn ((code == AND)
                             ? "sub.w\t%e0,%e0" : "not.w\t%e0",
                             operands);
+         else if ((TARGET_H8300H || TARGET_H8300S)
+                  && code == IOR
+                  && w1 == 0xffff
+                  && (w0 & 0x8000) != 0)
+           {
+             output_asm_insn ("exts.l\t%S0", operands);
+           }
          else if ((TARGET_H8300H || TARGET_H8300S)
                   && code == AND
                   && w1 == 0xff00)
@@ -2354,7 +2363,9 @@ compute_logical_op_length (mode, operands)
         using multiple insns.  */
       if ((TARGET_H8300H || TARGET_H8300S)
          && w0 != 0 && w1 != 0
-         && !(lower_half_easy_p && upper_half_easy_p))
+         && !(lower_half_easy_p && upper_half_easy_p)
+         && !(code == IOR && w1 == 0xffff
+              && (w0 & 0x8000) != 0 && lower_half_easy_p))
        {
          if (REG_P (operands[2]))
            length += 4;
@@ -2394,6 +2405,13 @@ compute_logical_op_length (mode, operands)
            {
              length += 2;
            }
+         else if ((TARGET_H8300H || TARGET_H8300S)
+                  && code == IOR
+                  && w1 == 0xffff
+                  && (w0 & 0x8000) != 0)
+           {
+             length += 2;
+           }
          else if ((TARGET_H8300H || TARGET_H8300S)
                   && code == AND
                   && w1 == 0xff00)
@@ -2475,10 +2493,22 @@ compute_logical_op_cc (mode, operands)
         using multiple insns.  */
       if ((TARGET_H8300H || TARGET_H8300S)
          && w0 != 0 && w1 != 0
-         && !(lower_half_easy_p && upper_half_easy_p))
+         && !(lower_half_easy_p && upper_half_easy_p)
+         && !(code == IOR && w1 == 0xffff
+              && (w0 & 0x8000) != 0 && lower_half_easy_p))
        {
          cc = CC_SET_ZNV;
        }
+      else
+       {
+         if ((TARGET_H8300H || TARGET_H8300S)
+             && code == IOR
+             && w1 == 0xffff
+             && (w0 & 0x8000) != 0)
+           {
+             cc = CC_SET_ZNV;
+           }
+       }
       break;
     default:
       abort ();