Remove diff pairs in ECPIX5Platform
authorJean THOMAS <git0@pub.jeanthomas.me>
Thu, 4 Jun 2020 09:44:42 +0000 (11:44 +0200)
committerJean THOMAS <git0@pub.jeanthomas.me>
Thu, 4 Jun 2020 09:44:42 +0000 (11:44 +0200)
There is a weird issue occuring with diff pairs for clk and dqs signals. I double checked if those pins could be used for differential signals and it seems ok.

examples/customecpix5.py

index e77baef15ee287b6641d8679ccd29c0b947fac5a..63ddfd5409864b67f74ca4890996d85e5f6cfa8a 100644 (file)
@@ -56,15 +56,19 @@ class ECPIX5Platform(LatticeECP5Platform):
             attrs=Attrs(IO_TYPE="LVCMOS33"),
         ),
 
+        # ERROR: cannot place differential IO at location PIOB
+        # if we choose to use DiffPairs
         Resource("ddr3", 0,
-            Subsignal("clk",    DiffPairs("H3", "J3", dir="o"), Attrs(IO_TYPE="SSTL135D_I")),
+            Subsignal("clk",    Pins("H3", dir="o")),
+            #Subsignal("clk",    DiffPairs("H3", "J3", dir="o"), Attrs(IO_TYPE="SSTL135D_I")),
             Subsignal("cke", Pins("P1", dir="o")),
             Subsignal("we_n",     Pins("R3", dir="o")),
             Subsignal("ras_n",    Pins("T3", dir="o")),
             Subsignal("cas_n",    Pins("P2", dir="o")),
             Subsignal("a",      Pins("T5 M3 L3 V6 K2 W6 K3 L1 H2 L2 N1 J1 M1 K1", dir="o")),
             Subsignal("ba",     Pins("U6 N3 N4", dir="o")),
-            Subsignal("dqs",    DiffPairs("V4 V1", "U5 U2", dir="io"), Attrs(IO_TYPE="SSTL135D_I")),
+            #Subsignal("dqs",    DiffPairs("V4 V1", "U5 U2", dir="io"), Attrs(IO_TYPE="SSTL135D_I")),
+            Subsignal("dqs",    Pins("V4 V1", dir="io"), Attrs(IO_TYPE="SSTL135D_I", TERMINATION="OFF", DIFFRESISTOR="100")),
             Subsignal("dq",     Pins("T4 W4 R4 W5 R6 P6 P5 P4 R1 W3 T2 V3 U3 W1 T1 W2", dir="io")),
             Subsignal("dm",     Pins("J4 H5", dir="o")),
             Subsignal("odt",    Pins("P3", dir="o")),