r300: Translate fragment program DST in radeon_program_alu
authorNicolai Haehnle <nhaehnle@gmail.com>
Sat, 5 Jul 2008 20:44:37 +0000 (22:44 +0200)
committerNicolai Haehnle <nhaehnle@gmail.com>
Sun, 6 Jul 2008 08:00:35 +0000 (10:00 +0200)
src/mesa/drivers/dri/r300/r300_fragprog_emit.c
src/mesa/drivers/dri/r300/r500_fragprog_emit.c
src/mesa/drivers/dri/r300/radeon_program_alu.c

index 446517405ba0300e7d704898ea731ef29dfa1a13..30f513b5a31e4de58b4ba9179cb8136f5b4a035a 100644 (file)
@@ -1551,27 +1551,6 @@ static void emit_instruction(struct r300_pfs_compile_state *cs, struct prog_inst
                emit_arith(cs, PFS_OP_DP4, dest, mask,
                                src[0], src[1], undef, flags);
                break;
-       case OPCODE_DST:
-               src[0] = t_src(cs, fpi->SrcReg[0]);
-               src[1] = t_src(cs, fpi->SrcReg[1]);
-               /* dest.y = src0.y * src1.y */
-               if (mask & WRITEMASK_Y)
-                       emit_arith(cs, PFS_OP_MAD, dest, WRITEMASK_Y,
-                                       keep(src[0]), keep(src[1]),
-                                       pfs_zero, flags);
-               /* dest.z = src0.z */
-               if (mask & WRITEMASK_Z)
-                       emit_arith(cs, PFS_OP_MAD, dest, WRITEMASK_Z,
-                                       src[0], pfs_one, pfs_zero, flags);
-               /* result.x = 1.0
-                       * result.w = src1.w */
-               if (mask & WRITEMASK_XW) {
-                       REG_SET_VSWZ(src[1], SWIZZLE_111);      /*Cheat */
-                       emit_arith(cs, PFS_OP_MAD, dest,
-                                       mask & WRITEMASK_XW,
-                                       src[1], pfs_one, pfs_zero, flags);
-               }
-               break;
        case OPCODE_EX2:
                src[0] = t_scalar_src(cs, fpi->SrcReg[0]);
                emit_arith(cs, PFS_OP_EX2, dest, mask,
index 5b4d06ecf362161cd969ce9a18070324b28b5716..678114b8c17271b0d43bb591935d54a2f5e8eb7d 100644 (file)
@@ -709,20 +709,6 @@ static void do_inst(struct r500_pfs_compile_state *cs, struct prog_instruction *
                        set_argA_reg(cs, ip, 0, fpi->SrcReg[0]);
                        set_argB_reg(cs, ip, 1, fpi->SrcReg[1]);
                        break;
-               case OPCODE_DST:
-                       /* [1, src0.y*src1.y, src0.z, src1.w]
-                        * So basically MUL with lotsa swizzling. */
-                       ip = emit_alu(cs, R500_ALU_RGBA_OP_MAD, R500_ALPHA_OP_MAD, fpi->DstReg);
-                       set_src0(cs, ip, fpi->SrcReg[0]);
-                       set_src1(cs, ip, fpi->SrcReg[1]);
-                       set_argA(cs, ip, 0,
-                               (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x7) | R500_SWIZZLE_ONE,
-                               R500_SWIZZLE_ONE);
-                       set_argB(cs, ip, 1,
-                               (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x1c7) | R500_SWIZZLE_ONE | (R500_SWIZZLE_ONE << 6),
-                               make_alpha_swizzle(fpi->SrcReg[1]));
-                       set_argC(cs, ip, 0, R500_SWIZ_RGB_ZERO, R500_SWIZZLE_ZERO);
-                       break;
                case OPCODE_EX2:
                        src[0] = make_src(cs, fpi->SrcReg[0]);
                        emit_sop(cs, R500_ALPHA_OP_EX2, fpi->DstReg, src[0], make_sop_swizzle(fpi->SrcReg[0]));
index 483dfa2cdc3e7a5061e0606c3183d56cfaf26e7c..4a40d3e44d8453246cf87efb3b71b6f59c8e5d1f 100644 (file)
@@ -201,6 +201,18 @@ static void transform_DPH(struct radeon_transform_context* t,
        emit2(t->Program, OPCODE_DP4, inst->DstReg, src0, inst->SrcReg[1]);
 }
 
+/**
+ * [1, src0.y*src1.y, src0.z, src1.w]
+ * So basically MUL with lotsa swizzling.
+ */
+static void transform_DST(struct radeon_transform_context* t,
+       struct prog_instruction* inst)
+{
+       emit2(t->Program, OPCODE_MUL, inst->DstReg,
+               swizzle(inst->SrcReg[0], SWIZZLE_ONE, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE),
+               swizzle(inst->SrcReg[1], SWIZZLE_ONE, SWIZZLE_Y, SWIZZLE_ONE, SWIZZLE_W));
+}
+
 static void transform_FLR(struct radeon_transform_context* t,
        struct prog_instruction* inst)
 {
@@ -373,7 +385,7 @@ static void transform_XPD(struct radeon_transform_context* t,
  * no userData necessary.
  *
  * Eliminates the following ALU instructions:
- *  ABS, DPH, FLR, LIT, LRP, POW, SGE, SLT, SUB, SWZ, XPD
+ *  ABS, DPH, DST, FLR, LIT, LRP, POW, SGE, SLT, SUB, SWZ, XPD
  * using:
  *  MOV, ADD, MUL, MAD, FRC, DP3, LG2, EX2, CMP
  *
@@ -386,6 +398,7 @@ GLboolean radeonTransformALU(struct radeon_transform_context* t,
        switch(inst->Opcode) {
        case OPCODE_ABS: transform_ABS(t, inst); return GL_TRUE;
        case OPCODE_DPH: transform_DPH(t, inst); return GL_TRUE;
+       case OPCODE_DST: transform_DST(t, inst); return GL_TRUE;
        case OPCODE_FLR: transform_FLR(t, inst); return GL_TRUE;
        case OPCODE_LIT: transform_LIT(t, inst); return GL_TRUE;
        case OPCODE_LRP: transform_LRP(t, inst); return GL_TRUE;