+start-sanitize-r5900
+Fri Feb 20 01:29:16 1998 Jeffrey A Law (law@cygnus.com)
+
+ * gas/mips/r5900.s, gas/mips/r5900.d: Update for "mula.s" change.
+
+end-sanitize-r5900
+start-sanitize-m32rx
+Thu Feb 19 10:35:48 1998 Nick Clifton <nickc@cygnus.com>
+
+ * gas/m32r/m32rx.s (mvtc__subv): Avoid register conflict.
+
+ * gas/m32r/m32rx.d: Updated to match latest assembler output.
+end-sanitize-m32rx
start-sanitize-sky
Tue Feb 17 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
0+0050 <stuff\+(0x|)50> adda.s \$f12,\$f14
0+0054 <stuff\+(0x|)54> suba.s \$f10,\$f12
0+0058 <stuff\+(0x|)58> msuba.s \$f10,\$f12
-0+005c <stuff\+(0x|)5c> multa.s \$f10,\$f12
+0+005c <stuff\+(0x|)5c> mula.s \$f10,\$f12
0+0060 <stuff\+(0x|)60> madda.s \$f10,\$f12
0+0064 <stuff\+(0x|)64> max.s \$f10,\$f12,\$f14
0+0068 <stuff\+(0x|)68> min.s \$f10,\$f12,\$f14
+0+006c <stuff\+(0x|)6c> nop
stuff:
.ent stuff
- /* Integer instructions. */
-
- /* Coprocessor 0 instructions, minus standard ISA 3 ones.
- That leaves just the performance monitoring registers. */
-
di
ei
mfbpc $10
mtpc $4,$1
mtps $4,$1
+
+ adda.s $f12,$f14
+ suba.s $f10,$f12
+ msuba.s $f10,$f12
+ mula.s $f10,$f12
+ madda.s $f10,$f12
+ max.s $f10,$f12,$f14
+ min.s $f10,$f12,$f14
+# Nop just to fill out ot a 16byte boundary
+ nop