broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.

This will be reused in register spilling.

diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c
index 3ced2a4949969d56ef9409a411a88574ea6c1bad..b404390a799879d8e4b359490eaf69de2d1be64c 100644 (file)
--- a/src/broadcom/compiler/qpu_schedule.c
+++ b/src/broadcom/compiler/qpu_schedule.c
@@ -588,13 +588,8 @@ get_instruction_priority(const struct v3d_qpu_instr *inst)
         next_score++;
 
         /* Schedule texture read setup early to hide their latency better. */
-        if (inst->type == V3D_QPU_INSTR_TYPE_ALU &&
-            ((inst->alu.add.magic_write &&
-              v3d_qpu_magic_waddr_is_tmu(inst->alu.add.waddr)) ||
-             (inst->alu.mul.magic_write &&
-              v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr)))) {
+        if (v3d_qpu_writes_tmu(inst))
                 return next_score;
-        }
         next_score++;
 
         return baseline_score;

diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c
index f31c81f8ca4defd7571cde68aea6aa0a0aa51d0d..96033739431d05e54c255beb8cf499e4956806d6 100644 (file)
--- a/src/broadcom/qpu/qpu_instr.c
+++ b/src/broadcom/qpu/qpu_instr.c
@@ -556,6 +556,16 @@ v3d_qpu_add_op_uses_vpm(enum  v3d_qpu_add_op op)
         }
 }
 
+bool
+v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst)
+{
+        return (inst->type == V3D_QPU_INSTR_TYPE_ALU &&
+                ((inst->alu.add.magic_write &&
+                  v3d_qpu_magic_waddr_is_tmu(inst->alu.add.waddr)) ||
+                 (inst->alu.mul.magic_write &&
+                  v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr))));
+}
+
 bool
 v3d_qpu_uses_vpm(const struct v3d_qpu_instr *inst)
 {

diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h
index 2289e182256af347d4c8a3e31803483af90918ef..39232b0e61dff4ec2ec230849ae58e054aa8e1f2 100644 (file)
--- a/src/broadcom/qpu/qpu_instr.h
+++ b/src/broadcom/qpu/qpu_instr.h
@@ -437,6 +437,7 @@ bool v3d_qpu_magic_waddr_is_tmu(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST;
 bool v3d_qpu_magic_waddr_is_tlb(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST;
 bool v3d_qpu_magic_waddr_is_vpm(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST;
 bool v3d_qpu_magic_waddr_is_tsy(enum v3d_qpu_waddr waddr) ATTRIBUTE_CONST;
+bool v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst) ATTRIBUTE_CONST;
 bool v3d_qpu_writes_r3(const struct v3d_device_info *devinfo,
                        const struct v3d_qpu_instr *instr) ATTRIBUTE_CONST;
 bool v3d_qpu_writes_r4(const struct v3d_device_info *devinfo,