po9 allocation attempt #3 with Rc in usual location
authorJacob Lifshay <programmerjake@gmail.com>
Fri, 9 Jun 2023 00:13:14 +0000 (17:13 -0700)
committerJacob Lifshay <programmerjake@gmail.com>
Fri, 9 Jun 2023 00:15:53 +0000 (17:15 -0700)
openpower/sv/po9_encoding/discussion.mdwn

index 0faae156390082c6af410b8b934976a2dece59eb..7fc14414fef62b946ab0a12784f22678aab19754 100644 (file)
@@ -123,3 +123,272 @@ Length detection:
     elif Word[30:31] = 0b00  return 32
     else                     return 64
 ```
+
+# alternative encoding (3)
+
+derived from <https://bugs.libre-soc.org/show_bug.cgi?id=924#c20>
+
+In order for `Rc` and similar fields to not move for 32-bit instructions, bits
+`28:29` are used as the main encoding bits instead of `30:31`.
+
+space saving measures: EXT2xx is half the size
+
+## length decoding algorithm
+```
+if PREFIX[0:5] = 1 then return 64
+else if PREFIX[0:5] = 9 then
+    if PREFIX[28:29] = 3 then
+        if PREFIX[26:27] = 3 then return 64
+        else return 32
+    else return 64
+else return 32
+```
+
+## short table
+```
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 0| 0| SVRM[22:23]| EXT0xx insn    | SVP64 ext0xx
+| 9| SVRM[0:21]            | 0| 1| SVRM[22:23]| EXT0xx insn    | SVP64Single ext0xx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| 0| EXT2xx insn | SVP64 ext2xx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| 1| EXT2xx insn | SVP64Single ext2xx
+| 9| -                 | 00| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 01| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 10| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 11| 1| 1| -                           | scalar 64-bit
+| 9| RT| RA| RB| OE| XO| 00| 1| 1| XO     | Rc| N/A            | XO-form 32-bit
+| 9| RT| RA| RB| XO    | 00| 1| 1| XO     | Rc| N/A            | X-form 32-bit
+| 9| RS| RA| sh| XO    | 00| 1| 1| sh     | Rc| N/A            | XS-form 32-bit
+```
+
+## SVP64Single in SFFS
+
+important note: SFFS implementations that don't implement SVP64 can still
+implement EXT2xx instructions by using the SVP64Single encoding with SVRM=0,
+no other SVP64 state needs to be implemented to do that.
+(TODO: double check that)
+
+## full table
+
+note: I mostly stashed stuff in EXT2xx, so the scalar 32-bit space is still
+mostly free, most the instructions I wanted in the scalar 32-bit space took
+up too much room. I didn't allocate XO values in EXT2xx yet since there's
+plenty of space (32 POs equivalent)
+
+note: setvl is split into a 32-bit insn with a common subset of settings and
+a full 64-bit insn with all the settings; svstep is 32-bit
+
+note: fmv/fcvt are 32-bit ops, so you can see how they easily fit around bits
+26-29 which are used to distinguish from SVP64 prefixes.
+
+```
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 0| 0| SVRM[22:23]| EXT0xx insn    | SVP64 ext0xx
+| 9| SVRM[0:21]            | 0| 1| SVRM[22:23]| EXT0xx insn    | SVP64Single ext0xx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| 0| EXT2xx insn | SVP64 ext2xx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| 1| EXT2xx insn | SVP64Single ext2xx
+| 9| -                 | 00| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 01| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 10| 1| 1| -          | N/A            | scalar 32-bit
+| 9| -                 | 11| 1| 1| -                           | scalar 64-bit
+| 9| RT| RA| RB| OE| XO| 00| 1| 1| XO     | Rc| N/A            | XO-form 32-bit
+| 9| RT| RA| RB| XO    | 00| 1| 1| XO     | Rc| N/A            | X-form 32-bit
+| 9| RS| RA| sh| XO    | 00| 1| 1| sh     | Rc| N/A            | XS-form 32-bit
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lbzup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lbzupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhzup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhzupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhaup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhaupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwzup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwzupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwaupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ldup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ldupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stbup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stbupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stdup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stdupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfdu
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfsup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfdupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lsdupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfdup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfsup
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfdupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfsupx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lbzuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhzuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhauspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwzuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwauspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lduspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stbuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwuspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stduspx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfdupsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lsdupsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfdupsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfsupsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lbzsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lbzusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhzsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhzusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhasx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhausx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwzsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwzusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwasx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwausx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ldsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ldusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lhbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lwbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ldbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stbsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stbusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stdsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stdusx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | sthbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stwbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stdbrsx
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfsxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfsuxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfdxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfduxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfiwaxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | lfiwzxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfsxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfsuxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfdxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfduxs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | stfiwxs
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | grevlut
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | grevluti
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ternlogi
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | crternlogi
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | binlut
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | crbinlut
+
+|0 |6  |11  |14        |26 |28|29|30          |32              |
+| 9|FRT|mode| XO       | 11| 1| 1| XO         | imm32          | fli 64-bit
+
+|0 |6  |11 |16 |21 |23 |26 |28|29|30      |31 |32|33 |38       |
+| 9| RT| RA| RB| sm|000| 00| 1| 1| 0      | Rc| N/A            | shadd
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | shadduw
+| 9| RT| RA| RB| sm|000| 00| 1| 1| 1      | Rc| N/A            | shaddw
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | absdu
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | avgadd
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | minmax
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | absaccs
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | absaccu
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | bmask
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | cprop
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| RT| RA| SVi   |001| 00| 1| 1| vs     | Rc| N/A            | setvl (common 32-bit, ms=vs, vf=0)
+| 9| TBD               | 11| 1| 1| TBD                         | setvl (full 64-bit)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | svremap
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | svshape
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | svshape2
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | svindex
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | mv.swizzle
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fmv.swizzle
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | crrweird
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | mfcrweird
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | mtcrrweird
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | mtcrweird
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | crweirder
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | mcrfm
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fptstp(s)
+
+|0 |6  |11 |13 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| RT| 11|111| SVi   |010| 00| 1| 1| vf     | Rc| N/A            | svstep
+| 9| RT| 10|111| FRB   |010| 00| 1| 1| 0      | Rc| N/A            | fmvtg
+| 9| RT| 10|111| FRB   |010| 00| 1| 1| 1      | Rc| N/A            | fmvtgs
+| 9|FRT| 01|111| RB    |010| 00| 1| 1| 0      | Rc| N/A            | fmvfg
+| 9|FRT| 01|111| RB    |010| 00| 1| 1| 1      | Rc| N/A            | fmvfgs
+| 9|FRT| IT|110| RB    |010| 00| 1| 1| 0      | Rc| N/A            | fcvtfg
+| 9|FRT| IT|110| RB    |010| 00| 1| 1| 1      | Rc| N/A            | fcvtfgs
+| 9| RT| IT|CVM| FRB   |010| 00| 1| 1| 0      | Rc| N/A            | fcvttg
+| 9|-  | - |0-5| -     |010| 00| 1| 1| 1      | Rc| N/A            | *reserved*
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | dsld
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | dsrd
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | maddedu
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | maddedus
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | divmod2du
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffadd(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffsub(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffmul(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffdiv(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fdmadd(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffmadd(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffmsub(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffnmadd(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ffnmsub(s)
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fsin(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fcos(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ftan(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fasin(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | facos(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fatan(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fsinpi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fcospi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ftanpi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fasinpi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | facospi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fatanpi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fsinh(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fcosh(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | ftanh(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fasinh(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | facosh(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fatanh(s)
+
+|0 |6  |11 |16 |21 |22 |26 |28|29|30      |31 |32|33 |38       |
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | frsqrt(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fcbrt(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | frecip(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexp2m1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flog2p1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexp2(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flog2(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexpm1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flogp1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexp(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flog(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexp10m1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flog10p1(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fexp10(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | flog10(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fatan2(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fatan2pi(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fpow(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fpown(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fpowr(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | frootn(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fhypot(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fminmax
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fmod(s)
+| 9| SVRM[0:21]            | 1| 0| SVRM[22:23]| -| TBD         | fremainder(s)
+```