add on-top-of section

diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn
index 4e80598404d2f9d0834e808de596ae8d689b0398..9111087d7668d9a9eaa073ef15f585d37db43a76 100644 (file)
--- a/simple_v_extension.mdwn
+++ b/simple_v_extension.mdwn
@@ -695,6 +695,19 @@ translates effectively to:
 | URSUB8 rt, ra, rb  | Unsigned Halving sub      | |
 
 
+# Impementing V on top of Simple-V
+
+* Number of Offset CSRs extends from 2
+* Extra register file: vector-file
+* Setup of Vector length and bitwidth CSRs now can specify vector-file
+  as well as integer or float file.
+* TODO
+
+# Implementing P (renamed to DSP) on top of Simple-V
+
+* Implementors indicate chosen bitwidth support in Vector-bitwidth CSR
+  (caveat: anything not specified drops through to software-emulation / traps)
+* TODO
 
 # References