.lower_fsat = true,
.lower_fsqrt = true,
.lower_negate = true,
+ .native_integers = true,
};
+const void *
+vc4_screen_get_compiler_options(struct pipe_screen *pscreen,
+ enum pipe_shader_ir ir, unsigned shader)
+{
+ return &nir_options;
+}
+
static int
count_nir_instrs(nir_shader *nir)
{
so->program_id = vc4->next_uncompiled_program_id++;
- if (vc4_debug & VC4_DEBUG_TGSI) {
- fprintf(stderr, "prog %d TGSI:\n",
- so->program_id);
- tgsi_dump(cso->tokens, 0);
- fprintf(stderr, "\n");
- }
+ nir_shader *s;
- nir_shader *s = tgsi_to_nir(cso->tokens, &nir_options);
+ if (cso->type == PIPE_SHADER_IR_NIR) {
+ /* The backend takes ownership of the NIR shader on state
+ * creation.
+ */
+ s = cso->ir.nir;
+ } else {
+ assert(cso->type == PIPE_SHADER_IR_TGSI);
+
+ if (vc4_debug & VC4_DEBUG_TGSI) {
+ fprintf(stderr, "prog %d TGSI:\n",
+ so->program_id);
+ tgsi_dump(cso->tokens, 0);
+ fprintf(stderr, "\n");
+ }
+ s = tgsi_to_nir(cso->tokens, &nir_options);
+ }
NIR_PASS_V(s, nir_opt_global_to_local);
NIR_PASS_V(s, nir_convert_to_ssa);
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return VC4_MAX_TEXTURE_SAMPLERS;
case PIPE_SHADER_CAP_PREFERRED_IR:
- return PIPE_SHADER_IR_TGSI;
+ return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
pscreen->get_name = vc4_screen_get_name;
pscreen->get_vendor = vc4_screen_get_vendor;
pscreen->get_device_vendor = vc4_screen_get_vendor;
+ pscreen->get_compiler_options = vc4_screen_get_compiler_options;
return pscreen;
vc4_screen_bo_from_handle(struct pipe_screen *pscreen,
struct winsys_handle *whandle);
+const void *
+vc4_screen_get_compiler_options(struct pipe_screen *pscreen,
+ enum pipe_shader_ir ir, unsigned shader);
+
extern uint32_t vc4_debug;
void