Indirection via $__soft_mul

diff --git a/techlibs/common/mul2dsp.v b/techlibs/common/mul2dsp.v
index 70c2c42c6dca5de611cba4f5fcecd690ffb7a875..8b1ddefbf80170ece42ea67f4e49e5b226cf563e 100644 (file)
--- a/techlibs/common/mul2dsp.v
+++ b/techlibs/common/mul2dsp.v
@@ -28,9 +28,7 @@ module \$mul (A, B, Y);
        output [Y_WIDTH-1:0] Y;\r
 \r
        generate\r
-       if (A_SIGNED != B_SIGNED)\r
-               wire _TECHMAP_FAIL_ = 1;\r
-       else if (A_WIDTH <= `DSP_A_MAXWIDTH && B_WIDTH <= `DSP_B_MAXWIDTH)\r
+       if (A_SIGNED != B_SIGNED || A_WIDTH <= 1 || B_WIDTH <= 1)\r
                wire _TECHMAP_FAIL_ = 1;\r
        // NB: A_SIGNED == B_SIGNED == 0 from here\r
        else if (A_WIDTH >= B_WIDTH)\r
@@ -212,7 +210,7 @@ module \$__mul (A, B, Y);
 endmodule\r
 \r
 (* techmap_celltype = "$__mul" *)\r
-module _90_internal_mul_to_external (A, B, Y); \r
+module $__soft_mul (A, B, Y); \r
        parameter A_SIGNED = 0;\r
        parameter B_SIGNED = 0;\r
        parameter A_WIDTH = 1;\r
@@ -223,9 +221,11 @@ module _90_internal_mul_to_external (A, B, Y);
        input [B_WIDTH-1:0] B;\r
        output [Y_WIDTH-1:0] Y;\r
 \r
+       // Indirection necessary since mapping\r
+       //   back to $mul will cause recursion\r
        generate\r
                if (A_SIGNED && !B_SIGNED)\r
-                       \$mul #(\r
+                       \$__soft__mul #(\r
                                .A_SIGNED(A_SIGNED),\r
                                .B_SIGNED(1),\r
                                .A_WIDTH(A_WIDTH),\r
@@ -233,23 +233,23 @@ module _90_internal_mul_to_external (A, B, Y);
                                .Y_WIDTH(Y_WIDTH)\r
                        ) _TECHMAP_REPLACE_ (\r
                                .A(A),\r
-                               .B({1'b0, B}),\r
+                               .B({1'b0,B}),\r
                                .Y(Y)\r
                        );\r
                else if (!A_SIGNED && B_SIGNED)\r
-                       \$mul #(\r
+                       \$__soft_mul #(\r
                                .A_SIGNED(1),\r
                                .B_SIGNED(B_SIGNED),\r
                                .A_WIDTH(A_WIDTH+1),\r
                                .B_WIDTH(B_WIDTH),\r
                                .Y_WIDTH(Y_WIDTH)\r
                        ) _TECHMAP_REPLACE_ (\r
-                               .A({1'b0, A}),\r
+                               .A({1'b0,A}),\r
                                .B(B),\r
                                .Y(Y)\r
                        );\r
                else\r
-                       \$mul #(\r
+                       \$__soft_mul #(\r
                                .A_SIGNED(A_SIGNED),\r
                                .B_SIGNED(B_SIGNED),\r
                                .A_WIDTH(A_WIDTH),\r

diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc
index 77bd0ac81ad2527c5857ac1b4b3ebecafa0ab11e..fcb177491a648eda67210e98fea16c945f51b041 100644 (file)
--- a/techlibs/ice40/synth_ice40.cc
+++ b/techlibs/ice40/synth_ice40.cc
@@ -268,6 +268,7 @@ struct SynthIce40Pass : public ScriptPass
                        if (help_mode || dsp) {
                                run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)");
                                run("ice40_dsp", "(if -dsp)");
+                               run("chtype -set $mul t:$__soft_mul");
                        }
                        run("alumacc");
                        run("opt");