re PR rtl-optimization/83852 (ICE in sel_redirect_edge_and_branch, at sel-sched-ir...

        PR rtl-optimization/83852
        * gcc.dg/pr83852.c: New testcase.

From-SVN: r259373

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 7ab5274d29508c04d9d8787bcdb003090f1e5903..29ac9f8b92438f2c2461164476b709fef34bba05 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-04-13  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/83852
+       * gcc.dg/pr83852.c: New testcase.
+
 2018-04-13  Andreas Krebbel  <krebbel@linux.ibm.com>
 
         PR testsuite/85326

diff --git a/gcc/testsuite/gcc.dg/pr83852.c b/gcc/testsuite/gcc.dg/pr83852.c
new file mode 100644 (file)
index 0000000..68ef78b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr83852.c
@@ -0,0 +1,33 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-std=gnu99 -O2 -fselective-scheduling -fno-if-conversion -fno-tree-dse -w" } */
+long long int uo;
+unsigned int vt;
+
+void
+r5 (long long int h8, long long int pu)
+{
+  short int wj;
+  long long int *mh = h8;
+
+  for (wj = 0; wj < 3; ++wj)
+    {
+      int oq;
+      long long int ns, xf;
+
+      h8 += 2;
+      oq = !!h8 && !!wj;
+      ++uo;
+      vt ^= oq + uo;
+      ns = !!uo && !!vt;
+      xf = (h8 != 0) ? mh : 1;
+      pu += ns < xf;
+    }
+
+  for (pu = 0; pu < 1; ++pu)
+    {
+      int *sc;
+
+      sc = (int *)&pu;
+      *sc = 0;
+    }
+}