(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index cd6215fa741911b0baa65ff49330cc72181b4a7f..27a164ff61ae3878e70860bcc4e2bc1ec5631d1f 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -542,8 +542,9 @@ to connect to standard DIMMs.
 Extra-V appears to be a remarkable research project that, by leveraging
 OpenCAPI, assuming that the map of edges in any given arbitrary data graph
 could be kept by the main CPU in-memory, could distribute and delegate
-a limited-capability deterministic node-walking schedule actually right down into the memory itself (on the other side of that L1-4 cache barrier),
-where, thanks to the OpenCAPI Standard, many of the nightmare problems
+a limited-capability deterministic but most importantly *data-dependent*
+node-walking schedule actually right down into the memory itself (on the other side of that L1-4 cache barrier).
+Thanks to the OpenCAPI Standard, many of the nightmare problems
 of other more explicit parallel processing paradigms disappear.
 
 **Snitch**