Added new aic register definition, fix some interrupt related calls

dev/tsunami_cchip.cc:
    Change interrupt level to 20 for devices

--HG--
extra : convert_revision : deee68d5434643dc751de08e5a804c14d1a86efd

diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index 375664be039da43603a22d7003cef73ac7066ebc..4d436e895a79e3f2b685c6531e6c697b1e7852bd 100644 (file)
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -188,14 +188,14 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
                           // The bit is now set and it wasn't before (set)
                           if((dim[number] & bitvector) && (dir[number] & bitvector))
                           {
-                              tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ1, x);
+                              tsunami->intrctrl->post(number, TheISA::INTLEVEL_IRQ0, x);
                               DPRINTF(Tsunami, "posting dir interrupt to cpu 0\n");
                           }
                           else if (!(dir[number] & bitvector))
                           {
                               // The bit was set and now its now clear and
                               // we were interrupting on that bit before
-                              tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ1, x);
+                              tsunami->intrctrl->clear(number, TheISA::INTLEVEL_IRQ0, x);
                               DPRINTF(Tsunami, "dim write resulting in clear"
                                       "dir interrupt to cpu 0\n");
 
@@ -249,7 +249,7 @@ TsunamiCChip::postDRIR(uint32_t interrupt)
     for(int i=0; i < Tsunami::Max_CPUs; i++) {
         dir[i] = dim[i] & drir;
         if (dim[i] & bitvector) {
-                tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ1, interrupt);
+                tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ0, interrupt);
                 DPRINTF(Tsunami, "posting dir interrupt to cpu %d,"
                         "interrupt %d\n",i, interrupt);
         }
@@ -265,7 +265,7 @@ TsunamiCChip::clearDRIR(uint32_t interrupt)
         drir &= ~bitvector;
         for(int i=0; i < Tsunami::Max_CPUs; i++) {
             if (dir[i] & bitvector) {
-                tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ1, interrupt);
+                tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ0, interrupt);
                 DPRINTF(Tsunami, "clearing dir interrupt to cpu %d,"
                     "interrupt %d\n",i, interrupt);