#ifdef __x86_64__
-/* Returns true if the current inferior belongs to a x86-64 process,
- per the tdesc. */
+/* Returns true if THREAD belongs to a x86-64 process, per the tdesc. */
static int
-is_64bit_tdesc (void)
+is_64bit_tdesc (thread_info *thread)
{
- struct regcache *regcache = get_thread_regcache (current_thread, 0);
+ struct regcache *regcache = get_thread_regcache (thread, 0);
return register_size (regcache->tdesc, 0) == 8;
}
lwpid_t lwpid, int idx, void **base)
{
#ifdef __x86_64__
- int use_64bit = is_64bit_tdesc ();
+ lwp_info *lwp = find_lwp_pid (ptid_t (lwpid));
+ gdb_assert (lwp != nullptr);
+ int use_64bit = is_64bit_tdesc (get_lwp_thread (lwp));
if (use_64bit)
{
x86_target::low_get_thread_area (int lwpid, CORE_ADDR *addr)
{
#ifdef __x86_64__
- int use_64bit = is_64bit_tdesc ();
+ lwp_info *lwp = find_lwp_pid (ptid_t (lwpid));
+ gdb_assert (lwp != nullptr);
+ int use_64bit = is_64bit_tdesc (get_lwp_thread (lwp));
if (use_64bit)
{
#endif
{
- struct lwp_info *lwp = find_lwp_pid (ptid_t (lwpid));
struct thread_info *thr = get_lwp_thread (lwp);
struct regcache *regcache = get_thread_regcache (thr, 1);
unsigned int desc[4];
x86_target::low_cannot_store_register (int regno)
{
#ifdef __x86_64__
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return false;
#endif
x86_target::low_cannot_fetch_register (int regno)
{
#ifdef __x86_64__
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return false;
#endif
int is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
/* Is the inferior 32-bit? If so, then fixup the siginfo object. */
- if (!is_64bit_tdesc ())
+ if (!is_64bit_tdesc (current_thread))
return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
FIXUP_32);
/* No fixup for native x32 GDB. */
x86_target::get_regs_info ()
{
#ifdef __x86_64__
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return &amd64_linux_regs_info;
else
#endif
char *err)
{
#ifdef __x86_64__
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return amd64_install_fast_tracepoint_jump_pad (tpoint, tpaddr,
collector, lockaddr,
orig_size, jump_entry,
#ifdef __x86_64__
/* On x86-64, 5-byte jump instructions with a 4-byte offset are always
used for fast tracepoints. */
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return 5;
#endif
x86_target::emit_ops ()
{
#ifdef __x86_64__
- if (is_64bit_tdesc ())
+ if (is_64bit_tdesc (current_thread))
return &amd64_emit_ops;
else
#endif