added assertion to regression_rlwnm

diff --git a/src/openpower/decoder/isa/test_caller_shift_rot.py b/src/openpower/decoder/isa/test_caller_shift_rot.py
index c143c1a948444053756479cd90160523be4a0134..e0e32056918a2c7e7f57fdffd293810ed21f6a85 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_shift_rot.py
+++ b/src/openpower/decoder/isa/test_caller_shift_rot.py
@@ -16,6 +16,7 @@ class DecoderTestCase(FHDLTestCase):
         initial_regs[2] = 11
         with Program(lst, bigendian=False) as program:
             sim = self.run_tst_program(program, initial_regs)
+            self.assertEqual(sim.gpr(3), SelectableInt(0x8800, 64))
 
     def test_case_srw_1(self):
         lst = ["sraw 3, 1, 2"]