ac/addrlib: fix chip identification for Vega10, Arcturus, Raven2, Renoir

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h
index 0358ab127b288874aebac15483f5ab633b2454d2..6b598a39df8a98aa2f6a75010c57e883c7688ce8 100644 (file)
--- a/src/amd/addrlib/src/amdgpu_asic_addr.h
+++ b/src/amd/addrlib/src/amdgpu_asic_addr.h
@@ -77,25 +77,22 @@
 #define AMDGPU_ICELAND_RANGE    0x01, 0x14
 #define AMDGPU_TONGA_RANGE      0x14, 0x28
 #define AMDGPU_FIJI_RANGE       0x3C, 0x50
-
 #define AMDGPU_POLARIS10_RANGE  0x50, 0x5A
 #define AMDGPU_POLARIS11_RANGE  0x5A, 0x64
 #define AMDGPU_POLARIS12_RANGE  0x64, 0x6E
 #define AMDGPU_VEGAM_RANGE      0x6E, 0xFF
 
 #define AMDGPU_CARRIZO_RANGE    0x01, 0x21
-#define AMDGPU_BRISTOL_RANGE    0x10, 0x21
 #define AMDGPU_STONEY_RANGE     0x61, 0xFF
 
 #define AMDGPU_VEGA10_RANGE     0x01, 0x14
 #define AMDGPU_VEGA12_RANGE     0x14, 0x28
-#define AMDGPU_VEGA20_RANGE     0x28, 0xFF
+#define AMDGPU_VEGA20_RANGE     0x28, 0x32
+#define AMDGPU_ARCTURUS_RANGE   0x32, 0xFF
 
 #define AMDGPU_RAVEN_RANGE      0x01, 0x81
-#define AMDGPU_RAVEN2_RANGE     0x81, 0xFF
-#define AMDGPU_RENOIR_RANGE     0x01, 0x91
-
-#define AMDGPU_ARCTURUS_RANGE   0x32, 0xFF
+#define AMDGPU_RAVEN2_RANGE     0x81, 0x91
+#define AMDGPU_RENOIR_RANGE     0x91, 0xFF
 
 #define AMDGPU_NAVI10_RANGE     0x01, 0x0A
 #define AMDGPU_NAVI12_RANGE     0x0A, 0x14
@@ -131,7 +128,6 @@
 #define ASICREV_IS_VEGAM_P(r)          ASICREV_IS(r, VEGAM)
 
 #define ASICREV_IS_CARRIZO(r)          ASICREV_IS(r, CARRIZO)
-#define ASICREV_IS_CARRIZO_BRISTOL(r)  ASICREV_IS(r, BRISTOL)
 #define ASICREV_IS_STONEY(r)           ASICREV_IS(r, STONEY)
 
 #define ASICREV_IS_VEGA10_M(r)         ASICREV_IS(r, VEGA10)
@@ -139,13 +135,12 @@
 #define ASICREV_IS_VEGA12_P(r)         ASICREV_IS(r, VEGA12)
 #define ASICREV_IS_VEGA12_p(r)         ASICREV_IS(r, VEGA12)
 #define ASICREV_IS_VEGA20_P(r)         ASICREV_IS(r, VEGA20)
+#define ASICREV_IS_ARCTURUS(r)         ASICREV_IS(r, ARCTURUS)
 
 #define ASICREV_IS_RAVEN(r)            ASICREV_IS(r, RAVEN)
 #define ASICREV_IS_RAVEN2(r)           ASICREV_IS(r, RAVEN2)
 #define ASICREV_IS_RENOIR(r)           ASICREV_IS(r, RENOIR)
 
-#define ASICREV_IS_ARCTURUS(r)         ASICREV_IS(r, ARCTURUS)
-
 #define ASICREV_IS_NAVI10_P(r)         ASICREV_IS(r, NAVI10)
 #define ASICREV_IS_NAVI12(r)           ASICREV_IS(r, NAVI12)
 #define ASICREV_IS_NAVI14(r)           ASICREV_IS(r, NAVI14)