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Read bigger Verilog files.
author
Kaj Tuomi
<kaj.tuomi@siru.fi>
Sat, 18 May 2019 11:20:30 +0000
(14:20 +0300)
committer
Kaj Tuomi
<kaj.tuomi@siru.fi>
Sat, 18 May 2019 11:20:30 +0000
(14:20 +0300)
Hit parser limit with 3M gate design. This commit fix it.
frontends/verilog/Makefile.inc
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diff --git
a/frontends/verilog/Makefile.inc
b/frontends/verilog/Makefile.inc
index 0a1f97ac0b31ee511191a8f71de5fd375332cd39..6a8462b4189ab968a98235f2095e5da6e72464ec 100644
(file)
--- a/
frontends/verilog/Makefile.inc
+++ b/
frontends/verilog/Makefile.inc
@@
-14,7
+14,7
@@
frontends/verilog/verilog_lexer.cc: frontends/verilog/verilog_lexer.l
$(Q) mkdir -p $(dir $@)
$(P) flex -o frontends/verilog/verilog_lexer.cc $<
-frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=100000
+frontends/verilog/verilog_parser.tab.o: CXXFLAGS += -DYYMAXDEPTH=100000
00
OBJS += frontends/verilog/verilog_parser.tab.o
OBJS += frontends/verilog/verilog_lexer.o