Tue Nov 4 16:55:11 1997 Jim Wilson <wilson@cygnus.com>
+ * mips.md (insv, extzv, extv): Add change_address call.
+ (movsi_ulw, movsi_usw): Change QImode to BLKmode in pattern.
+
* integrate.c (save_for_inline_copying): Copy parm_reg_stack_loc.
* reload.c (find_reloads, case 'm' and 'o'): Reject HIGH constants.
if (GET_CODE (operands[1]) != MEM)
FAIL;
+ /* Change the mode to BLKmode for aliasing purposes. */
+ operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
+
/* Otherwise, emit a lwl/lwr pair to load the value. */
emit_insn (gen_movsi_ulw (operands[0], operands[1]));
DONE;
if (GET_CODE (operands[1]) != MEM)
FAIL;
+ /* Change the mode to BLKmode for aliasing purposes. */
+ operands[1] = change_address (operands[1], BLKmode, XEXP (operands[1], 0));
+
/* Otherwise, emit a lwl/lwr pair to load the value. */
emit_insn (gen_movsi_ulw (operands[0], operands[1]));
DONE;
if (GET_CODE (operands[0]) != MEM)
FAIL;
+ /* Change the mode to BLKmode for aliasing purposes. */
+ operands[0] = change_address (operands[0], BLKmode, XEXP (operands[0], 0));
+
/* Otherwise, emit a swl/swr pair to load the value. */
emit_insn (gen_movsi_usw (operands[0], operands[3]));
DONE;
(define_insn "movsi_ulw"
[(set (match_operand:SI 0 "register_operand" "=&d,&d")
- (unspec:SI [(match_operand:QI 1 "general_operand" "R,o")] 0))]
+ (unspec:SI [(match_operand:BLK 1 "general_operand" "R,o")] 0))]
""
"*
{
(set_attr "length" "2,4")])
(define_insn "movsi_usw"
- [(set (match_operand:QI 0 "memory_operand" "=R,o")
- (unspec:QI [(match_operand:SI 1 "reg_or_0_operand" "dJ,dJ")] 1))]
+ [(set (match_operand:BLK 0 "memory_operand" "=R,o")
+ (unspec:BLK [(match_operand:SI 1 "reg_or_0_operand" "dJ,dJ")] 1))]
""
"*
{