* ia64-raw.tbl: Replace non-ASCII char.

	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerate.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b4baed33674e5e493902fc051022e92413fde74a..e01b284031a48ead14e34ba0ae2e450d0daa050c 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2013-05-17  Alan Modra  <amodra@gmail.com>
+
+       * ia64-raw.tbl: Replace non-ASCII char.
+       * ia64-waw.tbl: Likewise.
+       * ia64-asmtab.c: Regenerate.
+
 2013-05-15  Saravanan Ekanathan <saravanan.ekanathan@amd.com>
 
        * i386-gen.c (cpu_flag_init): Add CpuFSGSBase in CPU_BDVER3_FLAGS.

diff --git a/opcodes/ia64-asmtab.c b/opcodes/ia64-asmtab.c
index f17dc918ccbc0c0513e6ce983a761a47dff43880..92e958cd699c0d1b1f58cc4c9438a4009982c5a4 100644 (file)
--- a/opcodes/ia64-asmtab.c
+++ b/opcodes/ia64-asmtab.c
@@ -102,7 +102,7 @@ dependencies[] = {
   { "CPUID#", 7, 0, 5, -1, NULL, },
   { "CR[CMCV]", 29, 0, 3, 74, NULL, },
   { "CR[DCR]", 29, 0, 3, 0, NULL, },
-  { "CR[EOI]", 29, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
+  { "CR[EOI]", 29, 0, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI - CR67)\" on page 2:119", },
   { "CR[GPTA]", 29, 0, 3, 9, NULL, },
   { "CR[IFA]", 29, 0, 1, 20, NULL, },
   { "CR[IFA]", 29, 0, 3, 20, NULL, },
@@ -124,13 +124,13 @@ dependencies[] = {
   { "CR[ITM]", 29, 0, 3, 1, NULL, },
   { "CR[ITV]", 29, 0, 3, 72, NULL, },
   { "CR[IVA]", 29, 0, 4, 2, NULL, },
-  { "CR[IVR]", 29, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR Ð CR65)\" on page 2:118", },
-  { "CR[LID]", 29, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID Ð CR64)\" on page 2:117", },
+  { "CR[IVR]", 29, 0, 7, 65, "SC Section 5.8.3.2, \"External Interrupt Vector Register (IVR - CR65)\" on page 2:118", },
+  { "CR[LID]", 29, 0, 7, 64, "SC Section 5.8.3.1, \"Local ID (LID - CR64)\" on page 2:117", },
   { "CR[LRR%], % in 0 - 1", 10, 0, 3, -1, NULL, },
   { "CR[PMV]", 29, 0, 3, 73, NULL, },
   { "CR[PTA]", 29, 0, 3, 8, NULL, },
   { "CR[TPR]", 29, 0, 3, 66, NULL, },
-  { "CR[TPR]", 29, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR Ð CR66)\" on page 2:119", },
+  { "CR[TPR]", 29, 0, 7, 66, "SC Section 5.8.3.3, \"Task Priority Register (TPR - CR66)\" on page 2:119", },
   { "CR[TPR]", 29, 0, 1, 66, NULL, },
   { "CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127", 11, 0, 0, -1, NULL, },
   { "DAHR%, % in 0-7", 12, 0, 1, -1, NULL, },
@@ -305,7 +305,7 @@ dependencies[] = {
   { "CPUID#", 7, 1, 0, -1, NULL, },
   { "CR[CMCV]", 29, 1, 2, 74, NULL, },
   { "CR[DCR]", 29, 1, 2, 0, NULL, },
-  { "CR[EOI]", 29, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI Ð CR67)\" on page 2:119", },
+  { "CR[EOI]", 29, 1, 7, 67, "SC Section 5.8.3.4, \"End of External Interrupt Register (EOI - CR67)\" on page 2:119", },
   { "CR[GPTA]", 29, 1, 2, 9, NULL, },
   { "CR[IFA]", 29, 1, 2, 20, NULL, },
   { "CR[IFS]", 29, 1, 2, 23, NULL, },

diff --git a/opcodes/ia64-raw.tbl b/opcodes/ia64-raw.tbl
index 88d6ec56dda6a2e84717661f7766d3c3fed3b286..1dcb90820501fca7049068a7ee35ef3ce35ce55a 100644 (file)
--- a/opcodes/ia64-raw.tbl
+++ b/opcodes/ia64-raw.tbl
@@ -45,7 +45,7 @@ CFM;  alloc;  IC:cfm-readers; none
 CPUID#;        IC:none;        IC:mov-from-IND-CPUID+3;        specific
 CR[CMCV];      IC:mov-to-CR-CMCV;      IC:mov-from-CR-CMCV;    data
 CR[DCR];       IC:mov-to-CR-DCR;       IC:mov-from-CR-DCR, IC:mem-readers-spec;        data
-CR[EOI];       IC:mov-to-CR-EOI;       IC:none;        SC Section 5.8.3.4, "End of External Interrupt Register (EOI Ð CR67)" on page 2:119
+CR[EOI];       IC:mov-to-CR-EOI;       IC:none;        SC Section 5.8.3.4, "End of External Interrupt Register (EOI - CR67)" on page 2:119
 CR[GPTA];      IC:mov-to-CR-GPTA;      IC:mov-from-CR-GPTA, thash;     data
 CR[IFA];       IC:mov-to-CR-IFA;       itc.i, itc.d, itr.i, itr.d;     implied
 CR[IFA];       IC:mov-to-CR-IFA;       IC:mov-from-CR-IFA;     data
@@ -67,13 +67,13 @@ CR[ITIR];   IC:mov-to-CR-ITIR;      itc.i, itc.d, itr.i, itr.d;     implied
 CR[ITM];       IC:mov-to-CR-ITM;       IC:mov-from-CR-ITM;     data
 CR[ITV];       IC:mov-to-CR-ITV;       IC:mov-from-CR-ITV;     data
 CR[IVA];       IC:mov-to-CR-IVA;       IC:mov-from-CR-IVA;     instr
-CR[IVR];       IC:none;        IC:mov-from-CR-IVR;     SC Section 5.8.3.2, "External Interrupt Vector Register (IVR Ð CR65)" on page 2:118
-CR[LID];       IC:mov-to-CR-LID;       IC:mov-from-CR-LID;     SC Section 5.8.3.1, "Local ID (LID Ð CR64)" on page 2:117
+CR[IVR];       IC:none;        IC:mov-from-CR-IVR;     SC Section 5.8.3.2, "External Interrupt Vector Register (IVR - CR65)" on page 2:118
+CR[LID];       IC:mov-to-CR-LID;       IC:mov-from-CR-LID;     SC Section 5.8.3.1, "Local ID (LID - CR64)" on page 2:117
 CR[LRR%], % in 0 - 1;  IC:mov-to-CR-LRR+1;     IC:mov-from-CR-LRR+1;   data
 CR[PMV];       IC:mov-to-CR-PMV;       IC:mov-from-CR-PMV;     data
 CR[PTA];       IC:mov-to-CR-PTA;       IC:mov-from-CR-PTA, IC:mem-readers, IC:mem-writers, IC:non-access, thash;       data
 CR[TPR];       IC:mov-to-CR-TPR;       IC:mov-from-CR-TPR, IC:mov-from-CR-IVR; data
-CR[TPR];       IC:mov-to-CR-TPR;       IC:mov-to-PSR-l+17, ssm+17;     SC Section 5.8.3.3, "Task Priority Register (TPR Ð CR66)" on page 2:119
+CR[TPR];       IC:mov-to-CR-TPR;       IC:mov-to-PSR-l+17, ssm+17;     SC Section 5.8.3.3, "Task Priority Register (TPR - CR66)" on page 2:119
 CR[TPR];       IC:mov-to-CR-TPR;       rfi;    implied
 CR%, % in 3-7, 10-15, 18, 28-63, 75-79, 82-127;        IC:none;        IC:mov-from-CR-rv+1;    none
 DAHR%, % in 0-7;       br.call, brl.call, br.ret, IC:mov-to-DAHR;      br.call, IC:mem-readers, IC:mem-writers, IC:mov-from-DAHR;      implied

diff --git a/opcodes/ia64-waw.tbl b/opcodes/ia64-waw.tbl
index 44efaa8314753cfd60212cc4bc2b2212c2f0cffb..6fe9a843506c16e6573fcea60f338021047306ee 100644 (file)
--- a/opcodes/ia64-waw.tbl
+++ b/opcodes/ia64-waw.tbl
@@ -44,7 +44,7 @@ CFM;  IC:mod-sched-brs, br.call, brl.call, br.ret, alloc, clrrrb, cover, rfi; IC:
 CPUID#;        IC:none;        IC:none;        none
 CR[CMCV];      IC:mov-to-CR-CMCV;      IC:mov-to-CR-CMCV;      impliedF
 CR[DCR];       IC:mov-to-CR-DCR;       IC:mov-to-CR-DCR;       impliedF
-CR[EOI];       IC:mov-to-CR-EOI;       IC:mov-to-CR-EOI;       SC Section 5.8.3.4, "End of External Interrupt Register (EOI Ð CR67)" on page 2:119
+CR[EOI];       IC:mov-to-CR-EOI;       IC:mov-to-CR-EOI;       SC Section 5.8.3.4, "End of External Interrupt Register (EOI - CR67)" on page 2:119
 CR[GPTA];      IC:mov-to-CR-GPTA;      IC:mov-to-CR-GPTA;      impliedF
 CR[IFA];       IC:mov-to-CR-IFA;       IC:mov-to-CR-IFA;       impliedF
 CR[IFS];       IC:mov-to-CR-IFS, cover;        IC:mov-to-CR-IFS, cover;        impliedF