st/nir: Don't lower indirects when linking

I believe this was stuck here early because otherwise
nir_opt_copy_prop_vars could undo what lower_io_to_temporaries does.
However that has since been fixed. Also, we now use scratch for large
variables so the comment is stale.

On radeonsi these are the shader-db results:

Totals:
SGPRS: 3955968 -> 3955968 (0.00 %)
VGPRS: 2220208 -> 2220220 (0.00 %)
Spilled SGPRs: 11387 -> 11387 (0.00 %)
Spilled VGPRs: 97 -> 97 (0.00 %)
Private memory VGPRs: 2528 -> 2528 (0.00 %)
Scratch size: 2656 -> 2656 (0.00 %) dwords per thread
Code Size: 76002108 -> 76002204 (0.00 %) bytes
LDS: 740 -> 740 (0.00 %) blocks
Max Waves: 772779 -> 772776 (-0.00 %)
Wait states: 0 -> 0 (0.00 %)

Totals from affected shaders:
SGPRS: 176 -> 176 (0.00 %)
VGPRS: 144 -> 156 (8.33 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 12104 -> 12200 (0.79 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 28 -> 25 (-10.71 %)
Wait states: 0 -> 0 (0.00 %)

The few small regressions are due to nir_opt_large_constants kicking in
when indirect lowering happens to result in smaller code after
optimization since the array is very simple.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index 081f85edf530d49c60cf16ea3d830abedcd57adf..4585455c85671c8594b22ec040b8a92a3fbaf3cc 100644 (file)
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -596,26 +596,10 @@ st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
       NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
       NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
 
-      /* The backend might not be able to handle indirects on
-       * temporaries so we need to lower indirects on any of the
-       * varyings we have demoted here.
-       *
-       * TODO: radeonsi shouldn't need to do this, however LLVM isn't
-       * currently smart enough to handle indirects without causing excess
-       * spilling causing the gpu to hang.
-       *
-       * See the following thread for more details of the problem:
-       * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
-       */
-      nir_variable_mode indirect_mask = nir_var_function_temp;
-
-      NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
-      NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
-
       st_nir_opts(*producer, scalar);
       st_nir_opts(*consumer, scalar);
 
-      /* Lowering indirects can cause varying to become unused.
+      /* Optimizations can cause varyings to become unused.
        * nir_compact_varyings() depends on all dead varyings being removed so
        * we need to call nir_remove_dead_variables() again here.
        */